From: Rob Rice <rob.rice@broadcom.com>
To: Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
bcm-kernel-feedback-list@broadcom.com,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: Rob Rice <rob.rice@broadcom.com>, Steve Lin <steven.lin1@broadcom.com>
Subject: [PATCH v3 1/3] crypto: brcm: DT documentation for Broadcom SPU hardware
Date: Wed, 25 Jan 2017 11:44:47 -0500 [thread overview]
Message-ID: <1485362689-11294-2-git-send-email-rob.rice@broadcom.com> (raw)
In-Reply-To: <1485362689-11294-1-git-send-email-rob.rice@broadcom.com>
Device tree documentation for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
---
.../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt
diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt
new file mode 100644
index 0000000..29b6007
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt
@@ -0,0 +1,22 @@
+The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
+cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
+blocks.
+
+Required properties:
+- compatible: Should be one of the following:
+ brcm,spum-crypto - for devices with SPU-M hardware
+ brcm,spu2-crypto - for devices with SPU2 hardware
+ brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3
+ and Rabin Fingerprint support
+ brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
+
+- reg: Should contain SPU registers location and length.
+- mboxes: The mailbox channel to be used to communicate with the SPU.
+ Mailbox channels correspond to DMA rings on the device.
+
+Example:
+ crypto@612d0000 {
+ compatible = "brcm,spum-crypto";
+ reg = <0 0x612d0000 0 0x900>;
+ mboxes = <&pdc0 0>;
+ };
--
2.1.0
next prev parent reply other threads:[~2017-01-25 16:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 16:44 [PATCH v3 0/3] Add Broadcom SPU Crypto Driver Rob Rice
2017-01-25 16:44 ` Rob Rice [this message]
2017-01-30 20:18 ` [PATCH v3 1/3] crypto: brcm: DT documentation for Broadcom SPU hardware Rob Herring
[not found] ` <1485362689-11294-1-git-send-email-rob.rice-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2017-01-25 16:44 ` [PATCH v3 2/3] crypto: brcm: Add Broadcom SPU driver Rob Rice
[not found] ` <1485362689-11294-3-git-send-email-rob.rice-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2017-02-02 14:05 ` Herbert Xu
[not found] ` <20170202140510.GB5289-lOAM2aK0SrRLBo1qDEOMRrpzq4S04n8Q@public.gmane.org>
2017-02-02 15:11 ` Rob Rice
2017-01-25 16:44 ` [PATCH v3 3/3] arm64: dts: ns2: Add Broadcom SPU driver DT entry Rob Rice
2017-01-30 23:35 ` [PATCH v3 0/3] Add Broadcom SPU Crypto Driver Florian Fainelli
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