From: Catalin Marinas <catalin.marinas@arm.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Nick Desaulniers <ndesaulniers@google.com>,
"open list:HARDWARE RANDOM NUMBER GENERATOR CORE"
<linux-crypto@vger.kernel.org>,
Herbert Xu <herbert@gondor.apana.org.au>,
Arnd Bergmann <arnd@arndb.de>,
Nathan Chancellor <natechancellor@gmail.com>,
Will Deacon <will@kernel.org>
Subject: Re: [PATCH] crypto: aegis128/simd - build 32-bit ARM for v8 architecture explicitly
Date: Wed, 2 Oct 2019 22:32:55 +0100 [thread overview]
Message-ID: <20191002213255.GA6931@mbp> (raw)
In-Reply-To: <CAKv+Gu_Tytff_hiTETu0h=Wvyr47ygBNGO-EVhJf4hMXug0D6w@mail.gmail.com>
On Wed, Oct 02, 2019 at 08:09:18PM +0200, Ard Biesheuvel wrote:
> On Wed, 2 Oct 2019 at 19:23, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > On Wed, Oct 02, 2019 at 09:47:41AM -0700, Nick Desaulniers wrote:
> > > I'm running into some inconsistencies between how clang parses target
> > > arch between command line flag, function __attribute__, assembler
> > > directive, and disassembler. I see arch's like: armv8-a+crc,
> > > armv8-a+sve, armv8-a+fp16, armv8-a+memtag, armv8-a+lse, but I'm not
> > > familiar with the `+...` part of the target arch.
> >
> > This page shows the possible combinations:
> >
> > https://sourceware.org/binutils/docs/as/AArch64-Extensions.html#AArch64-Extensions
> >
> > Basically if it's an optional feature in ARMv8.0, you pass armv8-a+...
> > For optional features only in higher versions, it would be
> > armv8.5-a+memtag. The table above also states whether it's enabled by
> > default (i.e. mandatory) in an architecture version. SB for example is
> > supported from 8.0 but only required in 8.5.
>
> I am not convinced (but I haven't checked) that this is used in the
> same way on 32-bit.
Ah, I didn't realise this was about 32-bit. I don't think the above
applies in this case.
--
Catalin
next prev parent reply other threads:[~2019-10-02 21:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-02 7:54 [PATCH] crypto: aegis128/simd - build 32-bit ARM for v8 architecture explicitly Ard Biesheuvel
2019-10-02 14:47 ` Nathan Chancellor
2019-10-02 16:47 ` Nick Desaulniers
2019-10-02 17:23 ` Catalin Marinas
2019-10-02 18:09 ` Ard Biesheuvel
2019-10-02 21:32 ` Catalin Marinas [this message]
2019-10-10 12:55 ` Herbert Xu
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