From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: guoren@kernel.org
Cc: linux-arch@vger.kernel.org, linux-xtensa@linux-xtensa.org,
Guo Ren <guoren@linux.alibaba.com>,
linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
openrisc@lists.librecores.org, Paul Mackerras <paulus@samba.org>,
sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v5 4/7] powerpc/qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32
Date: Sun, 28 Mar 2021 13:14:28 +0200 [thread overview]
Message-ID: <e27af5e0-a462-cb75-6311-1b5a6b4ee4f1@csgroup.eu> (raw)
In-Reply-To: <1616913028-83376-5-git-send-email-guoren@kernel.org>
Le 28/03/2021 à 08:30, guoren@kernel.org a écrit :
> From: Guo Ren <guoren@linux.alibaba.com>
>
> We don't have native hw xchg16 instruction, so let qspinlock
> generic code to deal with it.
We have lharx/sthcx pair on some versions of powerpc.
See https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20201107032328.2454582-1-npiggin@gmail.com/
Christophe
>
> Using the full-word atomic xchg instructions implement xchg16 has
> the semantic risk for atomic operations.
>
> This patch cancels the dependency of on qspinlock generic code on
> architecture's xchg16.
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> ---
> arch/powerpc/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 386ae12d8523..69ec4ade6521 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -151,6 +151,7 @@ config PPC
> select ARCH_USE_CMPXCHG_LOCKREF if PPC64
> select ARCH_USE_QUEUED_RWLOCKS if PPC_QUEUED_SPINLOCKS
> select ARCH_USE_QUEUED_SPINLOCKS if PPC_QUEUED_SPINLOCKS
> + select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 if PPC_QUEUED_SPINLOCKS
> select ARCH_WANT_IPC_PARSE_VERSION
> select ARCH_WANT_IRQS_OFF_ACTIVATE_MM
> select ARCH_WANT_LD_ORPHAN_WARN
>
next prev parent reply other threads:[~2021-03-28 11:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-28 6:30 [PATCH v5 0/7] riscv: Add qspinlock/qrwlock guoren
2021-03-28 6:30 ` [PATCH v5 1/7] locking/qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32 guoren
2021-03-28 6:30 ` [PATCH v5 2/7] riscv: Convert custom spinlock/rwlock to generic qspinlock/qrwlock guoren
2021-03-28 6:30 ` [PATCH v5 3/7] csky: " guoren
2021-03-28 6:30 ` [PATCH v5 4/7] powerpc/qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32 guoren
2021-03-28 11:14 ` Christophe Leroy [this message]
2021-03-28 11:36 ` Guo Ren
2021-03-28 6:30 ` [PATCH v5 5/7] openrisc: qspinlock: " guoren
2021-03-28 6:30 ` [PATCH v5 6/7] sparc: " guoren
2021-03-28 6:30 ` [PATCH v5 7/7] xtensa: " guoren
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