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From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org
Cc: Ben Widawsky <ben.widawsky@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
	Vishal Verma <vishal.l.verma@intel.com>
Subject: [PATCH 1/7] cxl: Convert "RBI" to enum
Date: Tue, 21 Sep 2021 15:04:53 -0700	[thread overview]
Message-ID: <20210921220459.2437386-2-ben.widawsky@intel.com> (raw)
In-Reply-To: <20210921220459.2437386-1-ben.widawsky@intel.com>

In preparation for passing around the Register Block Indicator (RBI) as
a parameter, it is desirable to convert the type to an enum so that the
interface can use a well defined type checked parameter.

As a result of this change, should future versions of the spec add
sparsely defined identifiers, it could become a problem if checking for
invalid identifiers since the code currently checks for the max
identifier. This is not an issue with current spec, and the algorithm to
obtain the register blocks will change before those possible additions
are made.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
---
 drivers/cxl/pci.h | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/cxl/pci.h b/drivers/cxl/pci.h
index 8c1a58813816..7d3e4bf06b45 100644
--- a/drivers/cxl/pci.h
+++ b/drivers/cxl/pci.h
@@ -20,13 +20,15 @@
 #define CXL_REGLOC_BIR_MASK GENMASK(2, 0)
 
 /* Register Block Identifier (RBI) */
-#define CXL_REGLOC_RBI_MASK GENMASK(15, 8)
-#define CXL_REGLOC_RBI_EMPTY 0
-#define CXL_REGLOC_RBI_COMPONENT 1
-#define CXL_REGLOC_RBI_VIRT 2
-#define CXL_REGLOC_RBI_MEMDEV 3
-#define CXL_REGLOC_RBI_TYPES CXL_REGLOC_RBI_MEMDEV + 1
+enum cxl_regloc_type {
+	CXL_REGLOC_RBI_EMPTY = 0,
+	CXL_REGLOC_RBI_COMPONENT,
+	CXL_REGLOC_RBI_VIRT,
+	CXL_REGLOC_RBI_MEMDEV,
+	CXL_REGLOC_RBI_TYPES
+};
 
+#define CXL_REGLOC_RBI_MASK GENMASK(15, 8)
 #define CXL_REGLOC_ADDR_MASK GENMASK(31, 16)
 
 #endif /* __CXL_PCI_H__ */
-- 
2.33.0


  reply	other threads:[~2021-09-21 22:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21 22:04 [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:04 ` Ben Widawsky [this message]
2021-09-21 22:04 ` [PATCH 2/7] cxl/pci: Remove dev_dbg for unknown register blocks Ben Widawsky
2021-09-21 22:04 ` [PATCH 3/7] cxl/pci: Refactor cxl_pci_setup_regs Ben Widawsky
2021-09-21 23:39   ` Dan Williams
2021-09-22  4:31     ` Ben Widawsky
2021-09-21 22:04 ` [PATCH 4/7] cxl/pci: Make more use of cxl_register_map Ben Widawsky
2021-09-21 22:04 ` [PATCH 5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC Ben Widawsky
2021-09-22  9:33   ` Frederic Barrat
2021-09-21 22:04 ` [PATCH 6/7] cxl/pci: Use pci core's DVSEC functionality Ben Widawsky
2021-09-21 22:04 ` [PATCH 7/7] ocxl: " Ben Widawsky
2021-09-22  0:44   ` Dan Williams
2021-09-22  9:38     ` Frederic Barrat
2021-09-21 22:14 ` [PATCH 0/7] cxl_pci refactor for reusability Ben Widawsky
2021-09-21 22:28 ` Dan Williams
2021-09-21 23:03   ` Ben Widawsky

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