From: Dave Jiang <dave.jiang@intel.com>
To: Robert Richter <rrichter@amd.com>
Cc: linux-cxl@vger.kernel.org, dan.j.williams@intel.com,
ira.weiny@intel.com, vishal.l.verma@intel.com,
alison.schofield@intel.com, Jonathan.Cameron@huawei.com,
dave@stgolabs.net
Subject: Re: [PATCH v7 1/5] cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates()
Date: Fri, 26 Apr 2024 13:13:33 -0700 [thread overview]
Message-ID: <4fe3d95a-54cd-40ab-9cdd-b7417d38e75f@intel.com> (raw)
In-Reply-To: <Ziv8GfSMSbvlBB0h@rric.localdomain>
On 4/26/24 12:10 PM, Robert Richter wrote:
> On 03.04.24 08:47:12, Dave Jiang wrote:
>> The while() loop in cxl_endpoint_get_perf_coordinates() checks to see if
>> 'iter' is valid as part of the condition breaking out of the loop.
>> is_cxl_root() will stop the loop before the next iteration could go NULL.
>> Remove the iter check.
>>
>> The presence of the iter or removing the iter does not impact the behavior
>> of the code. This is a code clean up and not a bug fix.
>>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
>> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>> ---
>> drivers/cxl/core/port.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
>> index 2b0cab556072..6cbde50a742b 100644
>> --- a/drivers/cxl/core/port.c
>> +++ b/drivers/cxl/core/port.c
>> @@ -2197,7 +2197,7 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,
>> * port each iteration. If the parent is cxl root then there is
>> * nothing to gather.
>> */
>> - while (iter && !is_cxl_root(to_cxl_port(iter->dev.parent))) {
>> + while (!is_cxl_root(to_cxl_port(iter->dev.parent))) {
>
> I am seeing the following mainline after [1]:
>
> [ 39.815379] cxl_acpi ACPI0017:00: not a cxl_port device
> [ 39.827123] WARNING: CPU: 46 PID: 1754 at drivers/cxl/core/port.c:592 to_cxl_port+0x56/0x70 [cxl_core]
>
> ... plus some related subsequent NULL pointer dereference:
>
> [ 40.718708] BUG: kernel NULL pointer dereference, address: 00000000000002d8
>
> This changes looks related. I am going to dig deeper here but just a
> headsup in advance.
>
> Note this is tested on an RCH topology.
Hi Robert,
Can you please provide the 'ls -l /sys/bus/cxl/devices/$memX' of the RCH device? Maybe the iterator may need to be tweaked for RCH topology support.
>
> Thanks,
>
> -Robert
>
> [1] commit 586b5dfb51b9 ("Merge tag 'cxl-fixes-6.9-rc4' of
> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl"):
>
>> cxl_coordinates_combine(&c, &c, &dport->sw_coord);
>> c.write_latency += dport->link_latency;
>> c.read_latency += dport->link_latency;
>> --
>> 2.44.0
>>
>
next prev parent reply other threads:[~2024-04-26 20:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 15:47 [PATCH v7 0/5] cxl: access_coordinate validity fixes for 6.9 Dave Jiang
2024-04-03 15:47 ` [PATCH v7 1/5] cxl: Remove checking of iter in cxl_endpoint_get_perf_coordinates() Dave Jiang
2024-04-26 19:10 ` Robert Richter
2024-04-26 20:13 ` Dave Jiang [this message]
2024-04-03 15:47 ` [PATCH v7 2/5] cxl: Fix retrieving of access_coordinates in PCIe path Dave Jiang
2024-04-05 13:32 ` Jonathan Cameron
2024-04-05 22:24 ` Dan Williams
2024-04-03 15:47 ` [PATCH v7 3/5] cxl: Fix incorrect region perf data calculation Dave Jiang
2024-04-05 13:48 ` Jonathan Cameron
2024-04-05 22:34 ` Dan Williams
2024-04-08 9:54 ` Jonathan Cameron
2024-04-03 15:47 ` [PATCH v7 4/5] cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coord Dave Jiang
2024-04-03 15:47 ` [PATCH v7 5/5] cxl: Add checks to access_coordinate calculation to fail missing data Dave Jiang
2024-04-05 22:36 ` Dan Williams
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