From mboxrd@z Thu Jan 1 00:00:00 1970 From: Douglas Anderson Subject: [PATCH 3/4] ARM: dts: rockchip: Enable the USB phys as reset providers on rk3288 Date: Fri, 23 Oct 2015 11:28:10 -0700 Message-ID: <1445624891-31680-4-git-send-email-dianders@chromium.org> References: <1445624891-31680-1-git-send-email-dianders@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1445624891-31680-1-git-send-email-dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, kishon-l0cyMroinI0@public.gmane.org, johnyoun-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, balbi-l0cyMroinI0@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, Douglas Anderson , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, wulf-TNX95d0MmH7DzftRWevZcw@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org As per the change to the rk3288 USB phy driver, we can now enable the PHYs as reset providers. Do so. Signed-off-by: Douglas Anderson --- arch/arm/boot/dts/rk3288.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 906e938..4f76805 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -778,6 +778,7 @@ usbphy0: usb-phy0 { #phy-cells = <0>; + #reset-cells = <0>; reg = <0x320>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; @@ -785,6 +786,7 @@ usbphy1: usb-phy1 { #phy-cells = <0>; + #reset-cells = <0>; reg = <0x334>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; @@ -792,6 +794,7 @@ usbphy2: usb-phy2 { #phy-cells = <0>; + #reset-cells = <0>; reg = <0x348>; clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; -- 2.6.0.rc2.230.g3dd15c0