From: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
To: linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>,
Kevin Hilman <khilman-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Bartosz Golaszewski
<bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Adam Ford <aford173-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
Subject: [PATCH v6 32/41] ARM: da850: Remove legacy clock init
Date: Sat, 20 Jan 2018 11:14:11 -0600 [thread overview]
Message-ID: <1516468460-4908-33-git-send-email-david@lechnology.com> (raw)
In-Reply-To: <1516468460-4908-1-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.
Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
v6 changes:
- rebased
arch/arm/mach-davinci/da850.c | 646 ------------------------------------------
1 file changed, 646 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 0fdf647..a045f2b 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -37,559 +37,12 @@
#include "mux.h"
-#ifndef CONFIG_COMMON_CLK
-#include "clock.h"
-#include "psc.h"
-#endif
-
#define DA850_PLL1_BASE 0x01e1a000
#define DA850_TIMER64P2_BASE 0x01f0c000
#define DA850_TIMER64P3_BASE 0x01f0d000
#define DA850_REF_FREQ 24000000
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
- .num = 1,
- .phys_base = DA8XX_PLL0_BASE,
- .flags = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- .rate = DA850_REF_FREQ,
- .set_rate = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
- .name = "pll0",
- .parent = &ref_clk,
- .pll_data = &pll0_data,
- .flags = CLK_PLL,
- .set_rate = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
- .name = "pll0_aux_clk",
- .parent = &pll0_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
- .name = "pll0_sysclk1",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
- .name = "pll0_sysclk2",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
- .name = "pll0_sysclk3",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
- .set_rate = davinci_set_sysclk_rate,
- .maxrate = 100000000,
-};
-
-static struct clk pll0_sysclk4 = {
- .name = "pll0_sysclk4",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
- .name = "pll0_sysclk5",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
- .name = "pll0_sysclk6",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
- .name = "pll0_sysclk7",
- .parent = &pll0_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
- .num = 2,
- .phys_base = DA850_PLL1_BASE,
- .flags = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
- .name = "pll1",
- .parent = &ref_clk,
- .pll_data = &pll1_data,
- .flags = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
- .name = "pll1_aux_clk",
- .parent = &pll1_clk,
- .flags = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk2 = {
- .name = "pll1_sysclk2",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
- .name = "pll1_sysclk3",
- .parent = &pll1_clk,
- .flags = CLK_PLL,
- .div_reg = PLLDIV3,
-};
-
-static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
-{
- u32 val;
-
- val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-
- if (parent == &pll0_sysclk2) {
- val &= ~CFGCHIP3_ASYNC3_CLKSRC;
- } else if (parent == &pll1_sysclk2) {
- val |= CFGCHIP3_ASYNC3_CLKSRC;
- } else {
- pr_err("Bad parent on async3 clock mux\n");
- return -EINVAL;
- }
-
- writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-
- return 0;
-}
-
-static struct clk async3_clk = {
- .name = "async3",
- .parent = &pll1_sysclk2,
- .set_parent = da850_async3_set_parent,
-};
-
-static struct clk i2c0_clk = {
- .name = "i2c0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
- .name = "timer0",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
- .name = "timer1",
- .parent = &pll0_aux_clk,
-};
-
-static struct clk arm_rom_clk = {
- .name = "arm_rom",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_ARM_RAM_ROM,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc0_clk = {
- .name = "tpcc0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPCC,
- .flags = ALWAYS_ENABLED | CLK_PSC,
-};
-
-static struct clk tptc0_clk = {
- .name = "tptc0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC0,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tptc1_clk = {
- .name = "tptc1",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_TPTC1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc1_clk = {
- .name = "tpcc1",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_TPCC1,
- .gpsc = 1,
- .flags = CLK_PSC | ALWAYS_ENABLED,
-};
-
-static struct clk tptc2_clk = {
- .name = "tptc2",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_TPTC2,
- .gpsc = 1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk pruss_clk = {
- .name = "pruss",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_PRUSS,
-};
-
-static struct clk uart0_clk = {
- .name = "uart0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_UART0,
-};
-
-static struct clk uart1_clk = {
- .name = "uart1",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_UART1,
- .gpsc = 1,
-};
-
-static struct clk uart2_clk = {
- .name = "uart2",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_UART2,
- .gpsc = 1,
-};
-
-static struct clk aintc_clk = {
- .name = "aintc",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC0_AINTC,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk gpio_clk = {
- .name = "gpio",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_GPIO,
- .gpsc = 1,
-};
-
-static struct clk i2c1_clk = {
- .name = "i2c1",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_I2C,
- .gpsc = 1,
-};
-
-static struct clk emif3_clk = {
- .name = "emif3",
- .parent = &pll0_sysclk5,
- .lpsc = DA8XX_LPSC1_EMIF3C,
- .gpsc = 1,
- .flags = ALWAYS_ENABLED,
-};
-
-static struct clk arm_clk = {
- .name = "arm",
- .parent = &pll0_sysclk6,
- .lpsc = DA8XX_LPSC0_ARM,
- .flags = ALWAYS_ENABLED,
- .set_rate = da850_set_armrate,
- .round_rate = da850_round_armrate,
-};
-
-static struct clk rmii_clk = {
- .name = "rmii",
- .parent = &pll0_sysclk7,
-};
-
-static struct clk emac_clk = {
- .name = "emac",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_CPGMAC,
- .gpsc = 1,
-};
-
-/*
- * In order to avoid adding the emac_clk to the clock lookup table twice (and
- * screwing up the linked list in the process) create a separate clock for
- * mdio inheriting the rate from emac_clk.
- */
-static struct clk mdio_clk = {
- .name = "mdio",
- .parent = &emac_clk,
-};
-
-static struct clk mcasp_clk = {
- .name = "mcasp",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_McASP0,
- .gpsc = 1,
-};
-
-static struct clk mcbsp0_clk = {
- .name = "mcbsp0",
- .parent = &async3_clk,
- .lpsc = DA850_LPSC1_McBSP0,
- .gpsc = 1,
-};
-
-static struct clk mcbsp1_clk = {
- .name = "mcbsp1",
- .parent = &async3_clk,
- .lpsc = DA850_LPSC1_McBSP1,
- .gpsc = 1,
-};
-
-static struct clk lcdc_clk = {
- .name = "lcdc",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_LCDC,
- .gpsc = 1,
-};
-
-static struct clk mmcsd0_clk = {
- .name = "mmcsd0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_MMC_SD,
-};
-
-static struct clk mmcsd1_clk = {
- .name = "mmcsd1",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_MMC_SD1,
- .gpsc = 1,
-};
-
-static struct clk aemif_clk = {
- .name = "aemif",
- .parent = &pll0_sysclk3,
- .lpsc = DA8XX_LPSC0_EMIF25,
- .flags = ALWAYS_ENABLED,
-};
-
-/*
- * In order to avoid adding the aemif_clk to the clock lookup table twice (and
- * screwing up the linked list in the process) create a separate clock for
- * nand inheriting the rate from aemif_clk.
- */
-static struct clk aemif_nand_clk = {
- .name = "nand",
- .parent = &aemif_clk,
-};
-
-static struct clk usb11_clk = {
- .name = "usb11",
- .parent = &pll0_sysclk4,
- .lpsc = DA8XX_LPSC1_USB11,
- .gpsc = 1,
-};
-
-static struct clk usb20_clk = {
- .name = "usb20",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC1_USB20,
- .gpsc = 1,
-};
-
-static struct clk cppi41_clk = {
- .name = "cppi41",
- .parent = &usb20_clk,
-};
-
-static struct clk spi0_clk = {
- .name = "spi0",
- .parent = &pll0_sysclk2,
- .lpsc = DA8XX_LPSC0_SPI0,
-};
-
-static struct clk spi1_clk = {
- .name = "spi1",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_SPI1,
- .gpsc = 1,
-};
-
-static struct clk vpif_clk = {
- .name = "vpif",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_VPIF,
- .gpsc = 1,
-};
-
-static struct clk sata_clk = {
- .name = "sata",
- .parent = &pll0_sysclk2,
- .lpsc = DA850_LPSC1_SATA,
- .gpsc = 1,
- .flags = PSC_FORCE,
-};
-
-static struct clk dsp_clk = {
- .name = "dsp",
- .parent = &pll0_sysclk1,
- .domain = DAVINCI_GPSC_DSPDOMAIN,
- .lpsc = DA8XX_LPSC0_GEM,
- .flags = PSC_LRST | PSC_FORCE,
-};
-
-static struct clk ehrpwm_clk = {
- .name = "ehrpwm",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_PWM,
- .gpsc = 1,
-};
-
-static struct clk ehrpwm0_clk = {
- .name = "ehrpwm0",
- .parent = &ehrpwm_clk,
-};
-
-static struct clk ehrpwm1_clk = {
- .name = "ehrpwm1",
- .parent = &ehrpwm_clk,
-};
-
-#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
-
-static void ehrpwm_tblck_enable(struct clk *clk)
-{
- u32 val;
-
- val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
- val |= DA8XX_EHRPWM_TBCLKSYNC;
- writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
-}
-
-static void ehrpwm_tblck_disable(struct clk *clk)
-{
- u32 val;
-
- val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
- val &= ~DA8XX_EHRPWM_TBCLKSYNC;
- writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP1_REG));
-}
-
-static struct clk ehrpwm_tbclk = {
- .name = "ehrpwm_tbclk",
- .parent = &ehrpwm_clk,
- .clk_enable = ehrpwm_tblck_enable,
- .clk_disable = ehrpwm_tblck_disable,
-};
-
-static struct clk ehrpwm0_tbclk = {
- .name = "ehrpwm0_tbclk",
- .parent = &ehrpwm_tbclk,
-};
-
-static struct clk ehrpwm1_tbclk = {
- .name = "ehrpwm1_tbclk",
- .parent = &ehrpwm_tbclk,
-};
-
-static struct clk ecap_clk = {
- .name = "ecap",
- .parent = &async3_clk,
- .lpsc = DA8XX_LPSC1_ECAP,
- .gpsc = 1,
-};
-
-static struct clk ecap0_clk = {
- .name = "ecap0_clk",
- .parent = &ecap_clk,
-};
-
-static struct clk ecap1_clk = {
- .name = "ecap1_clk",
- .parent = &ecap_clk,
-};
-
-static struct clk ecap2_clk = {
- .name = "ecap2_clk",
- .parent = &ecap_clk,
-};
-
-static struct clk_lookup da850_clks[] = {
- CLK(NULL, "ref", &ref_clk),
- CLK(NULL, "pll0", &pll0_clk),
- CLK(NULL, "pll0_aux", &pll0_aux_clk),
- CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
- CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
- CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
- CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
- CLK(NULL, "pll0_sysclk5", &pll0_sysclk5),
- CLK(NULL, "pll0_sysclk6", &pll0_sysclk6),
- CLK(NULL, "pll0_sysclk7", &pll0_sysclk7),
- CLK(NULL, "pll1", &pll1_clk),
- CLK(NULL, "pll1_aux", &pll1_aux_clk),
- CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
- CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
- CLK(NULL, "async3", &async3_clk),
- CLK("i2c_davinci.1", NULL, &i2c0_clk),
- CLK(NULL, "timer0", &timerp64_0_clk),
- CLK("davinci-wdt", NULL, &timerp64_1_clk),
- CLK(NULL, "arm_rom", &arm_rom_clk),
- CLK(NULL, "tpcc0", &tpcc0_clk),
- CLK(NULL, "tptc0", &tptc0_clk),
- CLK(NULL, "tptc1", &tptc1_clk),
- CLK(NULL, "tpcc1", &tpcc1_clk),
- CLK(NULL, "tptc2", &tptc2_clk),
- CLK("pruss_uio", "pruss", &pruss_clk),
- CLK("serial8250.0", NULL, &uart0_clk),
- CLK("serial8250.1", NULL, &uart1_clk),
- CLK("serial8250.2", NULL, &uart2_clk),
- CLK(NULL, "aintc", &aintc_clk),
- CLK(NULL, "gpio", &gpio_clk),
- CLK("i2c_davinci.2", NULL, &i2c1_clk),
- CLK(NULL, "emif3", &emif3_clk),
- CLK(NULL, "arm", &arm_clk),
- CLK(NULL, "rmii", &rmii_clk),
- CLK("davinci_emac.1", NULL, &emac_clk),
- CLK("davinci_mdio.0", "fck", &mdio_clk),
- CLK("davinci-mcasp.0", NULL, &mcasp_clk),
- CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
- CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
- CLK("da8xx_lcdc.0", "fck", &lcdc_clk),
- CLK("da830-mmc.0", NULL, &mmcsd0_clk),
- CLK("da830-mmc.1", NULL, &mmcsd1_clk),
- CLK("ti-aemif", NULL, &aemif_clk),
- CLK("davinci-nand.0", "aemif", &aemif_nand_clk),
- CLK("ohci-da8xx", NULL, &usb11_clk),
- CLK("musb-da8xx", NULL, &usb20_clk),
- CLK("cppi41-dmaengine", NULL, &cppi41_clk),
- CLK("spi_davinci.0", NULL, &spi0_clk),
- CLK("spi_davinci.1", NULL, &spi1_clk),
- CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", "fck", &sata_clk),
- CLK("davinci-rproc.0", NULL, &dsp_clk),
- CLK(NULL, NULL, &ehrpwm_clk),
- CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
- CLK("ehrpwm.1", "fck", &ehrpwm1_clk),
- CLK(NULL, NULL, &ehrpwm_tbclk),
- CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk),
- CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk),
- CLK(NULL, NULL, &ecap_clk),
- CLK("ecap.0", "fck", &ecap0_clk),
- CLK("ecap.1", "fck", &ecap1_clk),
- CLK("ecap.2", "fck", &ecap2_clk),
- CLK(NULL, NULL, NULL),
-};
-#endif
-
/*
* Device specific mux setup
*
@@ -964,8 +417,6 @@ static struct map_desc da850_io_desc[] = {
},
};
-static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
-
/* Contents of JTAG ID register used to identify exact cpu type */
static struct davinci_id da850_ids[] = {
{
@@ -1175,93 +626,11 @@ int da850_register_cpufreq(char *async_clk)
return platform_device_register(&da850_cpufreq_device);
}
-
-#ifndef CONFIG_COMMON_CLK
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
-{
- int ret = 0, diff;
- unsigned int best = (unsigned int) -1;
- struct cpufreq_frequency_table *table = cpufreq_info.freq_table;
- struct cpufreq_frequency_table *pos;
-
- rate /= 1000; /* convert to kHz */
-
- cpufreq_for_each_entry(pos, table) {
- diff = pos->frequency - rate;
- if (diff < 0)
- diff = -diff;
-
- if (diff < best) {
- best = diff;
- ret = pos->frequency;
- }
- }
-
- return ret * 1000;
-}
-
-static int da850_set_armrate(struct clk *clk, unsigned long index)
-{
- struct clk *pllclk = &pll0_clk;
-
- return clk_set_rate(pllclk, index);
-}
-
-static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
-{
- struct pll_data *pll = clk->pll_data;
- struct cpufreq_frequency_table *freq;
- unsigned int prediv, mult, postdiv;
- struct da850_opp *opp = NULL;
- int ret;
-
- rate /= 1000;
-
- for (freq = da850_freq_table;
- freq->frequency != CPUFREQ_TABLE_END; freq++) {
- /* rate is in Hz, freq->frequency is in KHz */
- if (freq->frequency == rate) {
- opp = (struct da850_opp *)freq->driver_data;
- break;
- }
- }
-
- if (!opp)
- return -EINVAL;
-
- prediv = opp->prediv;
- mult = opp->mult;
- postdiv = opp->postdiv;
-
- ret = davinci_set_pllrate(pll, prediv, mult, postdiv);
- if (WARN_ON(ret))
- return ret;
-
- return 0;
-}
-#endif /* CONFIG_COMMON_CLK */
#else
int __init da850_register_cpufreq(char *async_clk)
{
return 0;
}
-
-#ifndef CONFIG_COMMON_CLK
-static int da850_set_armrate(struct clk *clk, unsigned long rate)
-{
- return -EINVAL;
-}
-
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate)
-{
- return -EINVAL;
-}
-
-static int da850_round_armrate(struct clk *clk, unsigned long rate)
-{
- return clk->rate;
-}
-#endif /* CONFIG_COMMON_CLK */
#endif
/* VPIF resource, platform data */
@@ -1363,8 +732,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.jtag_id_reg = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
.ids = da850_ids,
.ids_num = ARRAY_SIZE(da850_ids),
- .psc_bases = da850_psc_bases,
- .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
@@ -1393,7 +760,6 @@ void __init da850_init(void)
void __init da850_init_time(void)
{
-#ifdef CONFIG_COMMON_CLK
void __iomem *pll0, *pll1, *psc0, *psc1;
struct regmap *cfgchip;
struct clk *clk;
@@ -1438,18 +804,6 @@ void __init da850_init_time(void)
clk = da8xx_cfgchip_register_tbclk(cfgchip);
clk_register_clkdev(clk, "tbclk", "ehrpwm.0");
clk_register_clkdev(clk, "tbclk", "ehrpwm.1");
-#else
- struct regmap *cfgchip;
- cfgchip = da8xx_register_cfgchip();
- if (WARN(IS_ERR(cfgchip), "failed to register CFGCHIP syscon"))
- return;
-
- /* Unlock writing to PLL registers */
- regmap_write_bits(cfgchip, CFGCHIP(0), CFGCHIP0_PLL_MASTER_LOCK, 0);
- regmap_write_bits(cfgchip, CFGCHIP(3), CFGCHIP3_PLL1_MASTER_LOCK, 0);
-
- davinci_clk_init(da850_clks);
-#endif
davinci_timer_init();
}
--
2.7.4
--
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next prev parent reply other threads:[~2018-01-20 17:14 UTC|newest]
Thread overview: 131+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-20 17:13 [PATCH v6 00/41] ARM: davinci: convert to common clock framework David Lechner
2018-01-20 17:13 ` [PATCH v6 03/41] clk: davinci: Add platform information for TI DA830 PLL David Lechner
2018-02-01 8:10 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 04/41] clk: davinci: Add platform information for TI DA850 PLL David Lechner
2018-02-01 8:58 ` Sekhar Nori
[not found] ` <834cb7ce-9406-a806-3ec1-a59766bd8a9d-l0cyMroinI0@public.gmane.org>
2018-02-01 19:04 ` David Lechner
[not found] ` <6f0146e4-72bc-7bc2-2135-44950949cd77-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-02 8:23 ` Sekhar Nori
2018-02-01 19:22 ` David Lechner
[not found] ` <7d7e0522-30d5-6232-853e-7ab32fadfe48-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-02 8:37 ` Sekhar Nori
[not found] ` <ceec9849-e3fb-0e9b-4000-aab3ca2f5a43-l0cyMroinI0@public.gmane.org>
2018-02-02 17:45 ` David Lechner
2018-01-20 17:13 ` [PATCH v6 05/41] clk: davinci: Add platform information for TI DM355 PLL David Lechner
[not found] ` <1516468460-4908-6-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-01 9:17 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 06/41] clk: davinci: Add platform information for TI DM365 PLL David Lechner
2018-02-01 9:28 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 07/41] clk: davinci: Add platform information for TI DM644x PLL David Lechner
2018-01-20 17:13 ` [PATCH v6 08/41] clk: davinci: Add platform information for TI DM646x PLL David Lechner
2018-01-20 17:13 ` [PATCH v6 09/41] dt-bindings: clock: New bindings for TI Davinci PSC David Lechner
2018-01-22 15:05 ` Rob Herring
2018-01-20 17:13 ` [PATCH v6 10/41] clk: davinci: New driver for davinci PSC clocks David Lechner
2018-02-01 9:55 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 11/41] clk: davinci: Add platform information for TI DA830 PSC David Lechner
2018-02-01 11:34 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 12/41] clk: davinci: Add platform information for TI DA850 PSC David Lechner
2018-02-01 11:42 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 13/41] clk: davinci: Add platform information for TI DM355 PSC David Lechner
2018-02-01 11:50 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 14/41] clk: davinci: Add platform information for TI DM365 PSC David Lechner
2018-02-01 11:55 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 15/41] clk: davinci: Add platform information for TI DM644x PSC David Lechner
2018-02-01 12:13 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 16/41] clk: davinci: Add platform information for TI DM646x PSC David Lechner
2018-02-01 12:17 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 17/41] dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks David Lechner
2018-01-29 19:59 ` Rob Herring
2018-02-02 6:20 ` Sekhar Nori
2018-02-02 17:50 ` David Lechner
2018-02-05 9:42 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 18/41] clk: davinci: New driver for TI " David Lechner
[not found] ` <1516468460-4908-19-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-02 13:19 ` Sekhar Nori
[not found] ` <c2138795-edcd-bb7d-094d-47dc049c33df-l0cyMroinI0@public.gmane.org>
2018-02-02 13:53 ` Sekhar Nori
2018-02-02 17:56 ` David Lechner
2018-01-20 17:13 ` [PATCH v6 20/41] ARM: da830: add new clock init using common clock framework David Lechner
[not found] ` <1516468460-4908-21-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-22 17:15 ` David Lechner
2018-02-02 14:12 ` Sekhar Nori
2018-02-02 18:03 ` David Lechner
2018-02-05 11:06 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 23/41] ARM: dm365: " David Lechner
2018-02-02 14:37 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 25/41] ARM: dm646x: " David Lechner
2018-02-02 14:55 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 26/41] ARM: da8xx: add new USB PHY " David Lechner
[not found] ` <1516468460-4908-27-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-22 17:17 ` David Lechner
2018-01-20 17:14 ` [PATCH v6 27/41] ARM: da8xx: add new sata_refclk " David Lechner
2018-02-02 14:59 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 29/41] ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS David Lechner
2018-02-02 15:04 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 30/41] ARM: davinci: switch to common clock framework David Lechner
2018-02-07 13:20 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 31/41] ARM: da830: Remove legacy clock init David Lechner
2018-02-07 13:28 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 33/41] ARM: dm355: " David Lechner
2018-02-07 13:42 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 34/41] ARM: dm365: " David Lechner
2018-02-07 13:44 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 35/41] ARM: dm644x: " David Lechner
[not found] ` <1516468460-4908-36-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-07 13:46 ` Sekhar Nori
[not found] ` <1516468460-4908-1-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-20 17:13 ` [PATCH v6 01/41] dt-bindings: clock: Add new bindings for TI Davinci PLL clocks David Lechner
2018-01-29 19:53 ` Rob Herring
2018-01-29 21:14 ` David Lechner
2018-01-30 14:50 ` Rob Herring
2018-01-30 18:46 ` David Lechner
2018-01-31 4:58 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 02/41] clk: davinci: New driver for davinci " David Lechner
[not found] ` <1516468460-4908-3-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-01 8:01 ` Sekhar Nori
2018-02-01 12:22 ` Sekhar Nori
2018-02-01 18:57 ` David Lechner
[not found] ` <3ed91881-8753-a541-31aa-c835329141b3-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-02 8:12 ` Sekhar Nori
2018-01-20 17:13 ` [PATCH v6 19/41] clk: davinci: New driver for TI DA8XX USB PHY clocks David Lechner
2018-02-02 13:59 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 21/41] ARM: da850: add new clock init using common clock framework David Lechner
2018-02-02 14:20 ` Sekhar Nori
2018-02-02 18:05 ` David Lechner
2018-01-20 17:14 ` [PATCH v6 22/41] ARM: dm355: " David Lechner
2018-02-02 14:36 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 24/41] ARM: dm644x: " David Lechner
2018-02-02 14:39 ` Sekhar Nori
2018-02-02 18:06 ` David Lechner
[not found] ` <d8325090-e369-5a1a-b34a-8174123b01ff-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-05 6:01 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 28/41] ARM: davinci: remove CONFIG_DAVINCI_RESET_CLOCKS David Lechner
2018-02-02 15:03 ` Sekhar Nori
2018-01-20 17:14 ` David Lechner [this message]
2018-02-07 13:35 ` [PATCH v6 32/41] ARM: da850: Remove legacy clock init Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 36/41] ARM: dm646x: " David Lechner
2018-02-07 15:06 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 38/41] ARM: davinci: remove legacy clocks David Lechner
[not found] ` <1516468460-4908-39-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-07 15:24 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 39/41] ARM: davinci: add device tree support to timer David Lechner
2018-01-20 17:14 ` [PATCH v6 37/41] ARM: da8xx: Remove legacy clock init David Lechner
2018-02-07 15:16 ` Sekhar Nori
2018-01-20 17:14 ` [PATCH v6 40/41] ARM: da8xx-dt: switch to device tree clocks David Lechner
2018-01-24 3:26 ` David Lechner
[not found] ` <335d92c8-1af2-da64-e366-95d7513ad69d-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-02-05 14:04 ` Bartosz Golaszewski
2018-02-05 15:33 ` Bartosz Golaszewski
2018-01-20 17:14 ` [PATCH v6 41/41] ARM: dts: da850: Add clocks David Lechner
2018-01-22 17:14 ` David Lechner
[not found] ` <1516468460-4908-42-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-24 4:08 ` David Lechner
2018-02-09 12:46 ` Sekhar Nori
2018-01-21 21:19 ` [PATCH v6 00/41] ARM: davinci: convert to common clock framework Adam Ford
2018-01-22 11:14 ` Bartosz Golaszewski
[not found] ` <CAMRc=MexJTMiD=URw1bv-qfGaTntZRXgfsSb_beYGkvO+LrpgQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-22 17:30 ` David Lechner
[not found] ` <d819e18f-7d74-d8c4-8056-bfc545f4d4e9-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-23 14:54 ` Bartosz Golaszewski
2018-01-23 16:03 ` David Lechner
2018-01-23 16:06 ` David Lechner
2018-01-23 17:03 ` Adam Ford
2018-01-23 18:10 ` Bartosz Golaszewski
2018-01-23 18:26 ` David Lechner
2018-01-23 18:34 ` Bartosz Golaszewski
2018-01-23 19:24 ` David Lechner
2018-01-23 19:53 ` Bartosz Golaszewski
[not found] ` <CAMRc=Me8HefZJYTkprqL2vpq_nLym4r6p-du7hoKwVk8kSCR8w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-23 20:01 ` David Lechner
2018-01-23 20:05 ` David Lechner
[not found] ` <f28601f6-d6f1-9a55-f3cf-62543412bd36-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-23 20:23 ` David Lechner
[not found] ` <fc54ab26-72be-1377-2ccb-72d34360c5eb-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-24 8:03 ` Bartosz Golaszewski
2018-01-25 12:53 ` Sekhar Nori
2018-01-25 13:34 ` Bartosz Golaszewski
2018-01-25 16:18 ` David Lechner
2018-01-25 17:05 ` Sekhar Nori
2018-01-23 17:04 ` Bartosz Golaszewski
2018-01-22 13:29 ` Bartosz Golaszewski
2018-01-22 17:11 ` David Lechner
2018-01-23 14:56 ` Bartosz Golaszewski
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