From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Shevchenko Subject: Re: [PATCH v2 1/3] dt-bindings: pinctrl: Add a reserved-gpio-ranges property Date: Fri, 26 Jan 2018 11:20:26 +0200 Message-ID: <1516958426.7000.1272.camel@linux.intel.com> References: <20180126011400.2191-1-sboyd@codeaurora.org> <20180126011400.2191-2-sboyd@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180126011400.2191-2-sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Stephen Boyd , Linus Walleij Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Timur Tabi , Bjorn Andersson , linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Grant Likely , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Thu, 2018-01-25 at 17:13 -0800, Stephen Boyd wrote: > Some qcom platforms make some GPIOs or pins unavailable for use > by non-secure operating systems, and thus reading or writing the > registers for those pins will cause access control issues. > Introduce a DT property to describe the set of GPIOs that are > available for use so that higher level OSes are able to know what > pins to avoid reading/writing. > gpio-controller; > #gpio-cells = <2>; > ngpios = <18>; > + reserved-gpio-ranges = <0 4>, <12 2>; What about preserving namespace, i.e. gpio-reserved-ranges vs. your variant? -- Andy Shevchenko Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html