Re: [PATCH v2 1/2] dt-bindings: devapc: add bindings for mtk-devapc

[Neal Liu <neal.liu@mediatek.com>]

On Fri, 2020-07-10 at 18:41 +0800, Matthias Brugger wrote:
> 
> On 09/07/2020 11:12, Neal Liu wrote:
> > Add bindings for mtk-devapc.
> > 
> > Signed-off-by: Neal Liu <neal.liu@mediatek.com>
> > ---
> >   .../devicetree/bindings/soc/mediatek/devapc.yaml   |   82 ++++++++++++++++++++
> >   1 file changed, 82 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml b/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> > new file mode 100644
> > index 0000000..f08243e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml
> > @@ -0,0 +1,82 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +# # Copyright 2020 MediaTek Inc.
> > +%YAML 1.2
> > +---
> > +$id: "https://urldefense.com/v3/__http://devicetree.org/schemas/soc/mediatek/devapc.yaml*__;Iw!!CTRNKA9wMg0ARbw!1TwSriUtXU2ZjXdZkLODgduBZYDtG23ix3jRxqvN3bdfV29MaK0FUZ5OrDu7VDBq$ "
> > +$schema: "https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1TwSriUtXU2ZjXdZkLODgduBZYDtG23ix3jRxqvN3bdfV29MaK0FUZ5OrNG2oecr$ "
> > +
> > +title: MediaTek Device Access Permission Control driver
> > +
> > +description: |
> > +  MediaTek bus fabric provides TrustZone security support and data
> > +  protection to prevent slaves from being accessed by unexpected masters.
> > +  The security violation is logged and sent to the processor for further
> > +  analysis and countermeasures.
> > +
> > +maintainers:
> > +  - Neal Liu <neal.liu@mediatek.com>
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - mediatek,mt6779-devapc
> > +
> > +  reg:
> > +    description: The base address of devapc register bank
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    description: A single interrupt specifier
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    description: Contains module clock source and clock names
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    description: Names of the clocks list in clocks property
> > +    maxItems: 1
> > +
> > +  mediatek-slv_type_num:
> > +    description: Numbers of slave type in mediatek platform
> > +    maxItems: 1
> 
> This should go in the DT data, have a look for example at:
> https://urldefense.com/v3/__https://elixir.bootlin.com/linux/latest/source/drivers/soc/mediatek/mtk-pmic-wrap.c*L1842__;Iw!!CTRNKA9wMg0ARbw!1TwSriUtXU2ZjXdZkLODgduBZYDtG23ix3jRxqvN3bdfV29MaK0FUZ5OrGIX64pv$ 
> and
> https://urldefense.com/v3/__https://elixir.bootlin.com/linux/latest/source/drivers/soc/mediatek/mtk-pmic-wrap.c*L1777__;Iw!!CTRNKA9wMg0ARbw!1TwSriUtXU2ZjXdZkLODgduBZYDtG23ix3jRxqvN3bdfV29MaK0FUZ5OrFN70av_$ 
> 

Okay, I'll try to follow this example.

> > +
> > +  mediatek-vio_dbgs:
> > +    description: The mask bit and start bit of devapc violation debug registers
> > +    maxItems: 5
> > +
> 
> same here
> 
> > +  mediatek-pds_offset:
> > +    description: The offset of devapc pds registers
> > +    maxItems: 1
> 
> same here
> 
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - clocks
> > +  - clock-names
> > +  - mediatek-slv_type_num
> > +  - mediatek-vio_dbgs
> > +  - mediatek-pds_offset
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/clock/mt6779-clk.h>
> > +
> > +    devapc: devapc@10207000 {
> > +      compatible = "mediatek,mt6779-devapc";
> > +      reg = <0x10207000 0x1000>;
> > +      interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_LOW>;
> > +      clocks = <&infracfg_ao CLK_INFRA_DEVICE_APC>;
> > +      clock-names = "devapc-infra-clock";
> > +
> > +      mediatek-slv_type_num = /bits/ 8 <1>;
> > +      mediatek-vio_dbgs = <0x0000FFFF 0x0>,
> > +                          <0x003F0000 0x10>,
> > +                          <0x00400000 0x16>,
> > +                          <0x00800000 0x17>,
> > +                          <0x0F000000 0x18>;
> > +      mediatek-pds_offset = <0x0 0x400 0x900 0x904
> > +                             0xF00 0xF10 0xF14 0xF20>;
> > +    };
> > 
> 
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