From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: tsbogend@alpha.franken.de, mturquette@baylibre.com,
sboyd@kernel.org, paul@crapouillou.net, robh+dt@kernel.org
Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
rick.tyliu@ingenic.com, sihui.liu@ingenic.com,
jun.jiang@ingenic.com, sernia.zhou@foxmail.com
Subject: [PATCH v4 4/5] MIPS: CI20: Reduce clocksource to 750 kHz.
Date: Sat, 26 Jun 2021 14:18:40 +0800 [thread overview]
Message-ID: <1624688321-69131-5-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com>
The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.
Reported-by: Nikolaus Schaller <hns@goldelico.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v4:
New patch.
arch/mips/boot/dts/ingenic/ci20.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 8877c62..3a4eaf1 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -525,10 +525,10 @@
&tcu {
/*
- * 750 kHz for the system timer and 3 MHz for the clocksource,
+ * 750 kHz for the system timer and clocksource,
* use channel #0 for the system timer, #1 for the clocksource.
*/
assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
<&tcu TCU_CLK_OST>;
- assigned-clock-rates = <750000>, <3000000>, <3000000>;
+ assigned-clock-rates = <750000>, <750000>, <3000000>;
};
--
2.7.4
next prev parent reply other threads:[~2021-06-26 6:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-26 6:18 [PATCH v4 0/5] Misc Ingenic patches 周琰杰 (Zhou Yanjie)
2021-06-26 6:18 ` [PATCH v4 1/5] MIPS: X1830: Respect cell count of common properties 周琰杰 (Zhou Yanjie)
2021-06-26 6:18 ` [PATCH v4 2/5] dt-bindings: clock: Add documentation for MAC PHY control bindings 周琰杰 (Zhou Yanjie)
2021-06-28 2:52 ` Stephen Boyd
2021-06-28 4:46 ` 周琰杰
2021-06-26 6:18 ` [PATCH v4 3/5] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-06-26 6:18 ` 周琰杰 (Zhou Yanjie) [this message]
2021-06-30 12:21 ` [PATCH v4 4/5] MIPS: CI20: Reduce clocksource to 750 kHz Paul Cercueil
2021-06-26 6:18 ` [PATCH v4 5/5] MIPS: CI20: Add second percpu timer for SMP 周琰杰 (Zhou Yanjie)
2021-06-30 12:24 ` Paul Cercueil
2021-07-02 12:04 ` Zhou Yanjie
2021-06-30 12:37 ` [PATCH v4 0/5] Misc Ingenic patches Thomas Bogendoerfer
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