Re: [PATCH v5 0/8] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support

From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>,
	Vadim Vlasov <V.Vlasov@baikalelectronics.ru>,
	Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>, <linux-mips@vger.kernel.org>,
	<linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 0/8] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support
Date: Fri, 22 May 2020 19:02:24 +0300	[thread overview]
Message-ID: <20200522160224.4bex4bz36uavnzoo@mobilestation> (raw)
In-Reply-To: <0bbed067-f588-ef3e-a98a-c4b291810e4f@linaro.org>

On Fri, May 22, 2020 at 05:44:55PM +0200, Daniel Lezcano wrote:
> On 22/05/2020 17:41, Serge Semin wrote:
> > On Fri, May 22, 2020 at 05:28:42PM +0200, Daniel Lezcano wrote:
> >> On 21/05/2020 22:48, Serge Semin wrote:
> >>> As for all Baikal-T1 SoC related patchsets, which need this, we replaced
> >>> the DW APB Timer legacy plain text-based dt-binding file with DT schema.
> >>> Similarly the MIPS GIC bindings file is also converted to DT schema seeing
> >>> it also defines the MIPS GIC Timer binding.
> >>>
> >>> Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a
> >>> functionality of two another timers: embedded into the MIPS GIC timer and
> >>> three external DW timers available over APB bus. But we can't use them
> >>> before the corresponding drivers are properly fixed. First of all DW APB
> >>> Timer shouldn't be bound to a single CPU, since as being accessible over
> >>> APB they are external with respect to all possible CPUs. Secondly there
> >>> might be more than just two DW APB Timers in the system (Baikal-T1 has
> >>> three of them), so permit the driver to use one of them as a clocksource
> >>> and the rest - for clockevents. Thirdly it's possible to use MIPS GIC
> >>> timer as a clocksource so register it in the corresponding subsystem
> >>> (the patch has been found in the Paul Burton MIPS repo so I left the
> >>> original Signed-off-by attribute). Finally in the same way as r4k timer
> >>> the MIPS GIC timer should be used with care when CPUFREQ config is enabled
> >>> since in case of CM2 the timer counting depends on the CPU reference clock
> >>> frequency while the clocksource subsystem currently doesn't support the
> >>> timers with non-stable clock.
> >>>
> >>> This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4:
> >>> base-commit: 0e698dfa2822 ("Linux 5.7-rc4")
> >>> tag: v5.7-rc4
> >>
> >> Applied patch 1,2,4,5,6,7,8
> >>
> >> Thanks!
> > 
> > Great! Thanks. Am I right to expect the series in: git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
> > at the branch timers/core?
> 
> The series first goes to:
> 
> https://git.linaro.org/people/daniel.lezcano/linux.git/log/?h=timers/drivers/next
> 
> , then I send the PR to Thomas, who send in turn a PR at the merge
> windows to Linus for the entire tip tree.

Ok. Thanks for clarification.

-Sergey

> 
> 
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