From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org, mark.rutland@arm.com,
linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org, alisaidi@amazon.com,
tsahee@amazon.com, harb@amperecomputing.com,
tuanphan@os.amperecomputing.com, james.yang@arm.com,
patrik.berglund@arm.com
Subject: [PATCH v2 1/3] perf: Add Arm CMN-600 DT binding
Date: Fri, 18 Sep 2020 14:28:37 +0100 [thread overview]
Message-ID: <394449fba250349c2251832da31ac709c5a21fdc.1600357241.git.robin.murphy@arm.com> (raw)
In-Reply-To: <cover.1600357241.git.robin.murphy@arm.com>
Document the requirements for the CMN-600 DT binding. The internal
topology is almost entirely discoverable by walking a tree of ID
registers, but sadly both the starting point for that walk and the
exact format of those registers are configuration-dependent and not
discoverable from some sane fixed location. Oh well.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
v2: fix filename, license and whitespace per Rob's comments
.../devicetree/bindings/perf/arm,cmn.yaml | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/arm,cmn.yaml
diff --git a/Documentation/devicetree/bindings/perf/arm,cmn.yaml b/Documentation/devicetree/bindings/perf/arm,cmn.yaml
new file mode 100644
index 000000000000..15689cbf417d
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/arm,cmn.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2020 Arm Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/arm-cmn.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm CMN (Coherent Mesh Network) Performance Monitors
+
+maintainers:
+ - Robin Murphy <robin.murphy@arm.com>
+
+properties:
+ compatible:
+ const: arm,cmn-600
+
+ reg:
+ items:
+ - description: Physical address of the base (PERIPHBASE) and
+ size (up to 64MB) of the configuration address space.
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+ items:
+ - description: Overflow interrupt for DTC0
+ - description: Overflow interrupt for DTC1
+ - description: Overflow interrupt for DTC2
+ - description: Overflow interrupt for DTC3
+ description: One interrupt for each DTC domain implemented must
+ be specified, in order. DTC0 is always present.
+
+ arm,root-node:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Offset from PERIPHBASE of the configuration
+ discovery node (see TRM definition of ROOTNODEBASE).
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - arm,root-node
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ pmu@50000000 {
+ compatible = "arm,cmn-600";
+ reg = <0x50000000 0x4000000>;
+ /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ arm,root-node = <0x104000>;
+ };
+...
--
2.28.0.dirty
next prev parent reply other threads:[~2020-09-18 13:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-18 13:28 [PATCH v2 0/3] Arm CMN-600 PMU driver Robin Murphy
2020-09-18 13:28 ` Robin Murphy [this message]
2020-09-18 17:31 ` [PATCH v2 1/3] perf: Add Arm CMN-600 DT binding Rob Herring
2020-09-18 13:28 ` [PATCH v2 2/3] perf: Add Arm CMN-600 PMU driver Robin Murphy
2020-09-18 13:28 ` [RFC 3/3] perf/arm-cmn: Add debugfs topology info Robin Murphy
2020-09-18 18:24 ` [PATCH v2.1 1/3] perf: Add Arm CMN-600 DT binding Robin Murphy
2020-09-18 18:54 ` Rob Herring
2020-09-19 0:23 ` Robin Murphy
2020-10-05 9:16 ` [PATCH v2 0/3] Arm CMN-600 PMU driver Zidenberg, Tsahi
2020-10-05 10:21 ` Will Deacon
2020-10-14 16:31 ` Robin Murphy
2020-10-15 7:26 ` Zidenberg, Tsahi
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