From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Mason Yang <masonccyang@mxic.com.tw>,
broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>,
devicetree@vger.kernel.org
Cc: juliensu@mxic.com.tw, Simon Horman <horms@verge.net.au>,
lee.jones@linaro.org, marek.vasut@gmail.com,
miquel.raynal@bootlin.com
Subject: Re: [PATCH v16 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
Date: Fri, 2 Aug 2019 23:02:48 +0300 [thread overview]
Message-ID: <3d01957a-7318-274f-f3d5-6cd00850511b@cogentembedded.com> (raw)
In-Reply-To: <1564539258-16313-2-git-send-email-masonccyang@mxic.com.tw>
Hello!
On 07/31/2019 05:14 AM, Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
>
> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[...]
> diff --git a/drivers/spi/spi-renesas-rpc.c b/drivers/spi/spi-renesas-rpc.c
> new file mode 100644
> index 0000000..648d14e
> --- /dev/null
> +++ b/drivers/spi/spi-renesas-rpc.c
> @@ -0,0 +1,754 @@
[...]
> +static void rpc_spi_hw_init(struct rpc_spi *rpc)
> +{
> + //
> + // NOTE: The 0x260 are undocumented bits, but they must be set.
> + // RPC_PHYCNT_STRTIM is strobe timing adjustment bit,
> + // 0x0 : the delay is biggest,
> + // 0x1 : the delay is 2nd biggest,
> + // On H3 ES1.x, the value should be 0, while on others,
> + // the value should be 6.
> + //
> + regmap_write(rpc->regmap, RPC_PHYCNT, RPC_PHYCNT_CAL |
> + RPC_PHYCNT_STRTIM(6) | 0x260);
> +
> + //
> + // NOTE: The 0x1511144 are undocumented bits, but they must be set
> + // for RPC_PHYOFFSET1.
> + // The 0x31 are undocumented bits, but they must be set
> + // for RPC_PHYOFFSET2.
> + //
> + regmap_write(rpc->regmap, RPC_PHYOFFSET1, RPC_PHYOFFSET1_DDRTMG(3) |
> + 0x1511144);
> + regmap_write(rpc->regmap, RPC_PHYOFFSET2, 0x31 |
> + RPC_PHYOFFSET2_OCTTMG(4));
> + regmap_write(rpc->regmap, RPC_SSLDR, RPC_SSLDR_SPNDL(7) |
> + RPC_SSLDR_SLNDL(7) | RPC_SSLDR_SCKDL(7));
> + regmap_write(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD | RPC_CMNCR_SFDE |
> + RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ |
> + RPC_CMNCR_BSZ(0));
> +}
[...]
> +static int rpc_spi_io_xfer(struct rpc_spi *rpc,
> + const void *tx_buf, void *rx_buf)
> +{
[...]
> +err_out:
> + return reset_control_reset(rpc->rstc);
Don't toy need to call rpc_spi_hw_init(( here? The reset would spoil
the PHY/etc register setup otherwise...
[...]
MBR, Sergei
next prev parent reply other threads:[~2019-08-02 20:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-31 2:14 [PATCH v16 0/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI driver Mason Yang
2019-07-31 2:14 ` [PATCH v16 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Mason Yang
2019-08-02 20:02 ` Sergei Shtylyov [this message]
2019-08-05 2:00 ` masonccyang
2019-07-31 2:14 ` [PATCH v16 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Mason Yang
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