Re: [PATCH 2/6] dt-bindings: usb: dwc3: Add the Amlogic A1 Family DWC3 Glue Bindings

[Neil Armstrong <narmstrong@baylibre.com>]

Hi,


On 22/11/2019 07:55, Hanjie Lin wrote:
> The Amlogic A1 SoC Family embeds 1 USB Controllers:
>  - a DWC3 IP configured as Host for USB2 and USB3
> 
> A glue connects the controllers to the USB2 PHY of A1 SoC.
> 
> Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
> Signed-off-by: Yue Wang <yue.wang@amlogic.com>
> ---
>  .../devicetree/bindings/usb/amlogic,dwc3.txt       | 53 ++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/amlogic,dwc3.txt b/Documentation/devicetree/bindings/usb/amlogic,dwc3.txt
> index 6ffb09b..63dc60b 100644
> --- a/Documentation/devicetree/bindings/usb/amlogic,dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/amlogic,dwc3.txt
> @@ -128,3 +128,56 @@ Example device nodes:
>  				snps,quirk-frame-length-adjustment;
>  			};
>  	};
> +
> +Amlogic Meson A1 DWC3 USB SoC Controller Glue
> +
> +The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
> +host-only mode.
> +
> +Required properties:
> +- compatible:	Should be "amlogic,meson-a1-usb-ctrl"
> +- clocks:       The clocks needed by the usb controller
> +- clock-names:  Should contain the name of the clocks: "usb_ctrl", "usb_bus",
> +                "xtal_usb_phy", "xtal_usb_ctrl"
> +- resets:	a handle for the shared "USB" reset line
> +- reg:		The base address and length of the registers
> +- phys: 	handle to used PHYs on the system
> +	- a <0> phandle can be used if a PHY is not used
> +- phy-names:	names of the used PHYs on the system :
> +	- "usb2-phy0" for USB2 PHY if USBHOST port is used
> +
> +Required child nodes:
> +
> +A child node must exist to represent the core DWC3 IP block. The name of
> +the node is not important. The content of the node is defined in dwc3.txt.
> +
> +PHY documentation is provided in the following places:
> +- Documentation/devicetree/bindings/phy/amlogic,meson-a1-usb2-phy.yaml
> +
> +Example device nodes:
> +	usb: usb@ffe09000 {
> +			status = "okay";
> +			compatible = "amlogic,meson-a1-usb-ctrl";
> +			reg = <0x0 0xffe09000 0x0 0xa0>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +
> +			clocks = <&clkc_periphs CLKID_USB_CTRL>,
> +				 <&clkc_periphs CLKID_USB_BUS>,
> +				 <&clkc_periphs CLKID_XTAL_USB_PHY>,
> +				 <&clkc_periphs CLKID_XTAL_USB_CTRL>;
> +			clock-names = "usb_ctrl", "usb_bus", "xtal_usb_phy", "xtal_usb_ctrl";
> +			resets = <&reset RESET_USBCTRL>;
> +			phys = <&usb2_phy0>;
> +			phy-names = "usb2-phy0";
> +
> +			dwc3: usb@ff400000 {
> +					compatible = "snps,dwc3";
> +					reg = <0x0 0xff400000 0x0 0x100000>;
> +					interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> +					dr_mode = "host";
> +					snps,dis_u2_susphy_quirk;
> +					snps,quirk-frame-length-adjustment = <0x20>;
> +			};
> +	};
> 

This seems very similar to the g12a bindings, seems you could update the yaml g12a bindings
with specific clocks and required for amlogic,meson-a1-usb-ctrl.

Neil