devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "G Jaya Kumaran, Vineetha" <vineetha.g.jaya.kumaran@intel.com>
To: Rob Herring <robh@kernel.org>
Cc: "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
	"u.kleine-koenig@pengutronix.de" <u.kleine-koenig@pengutronix.de>,
	"linux-pwm@vger.kernel.org" <linux-pwm@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Wan Mohamad,
	Wan Ahmad Zainie"  <wan.ahmad.zainie.wan.mohamad@intel.com>,
	"Shevchenko, Andriy" <andriy.shevchenko@intel.com>
Subject: RE: [PATCH 3/3] dt-bindings: pwm: keembay: Add bindings for Intel Keem Bay PWM
Date: Wed, 20 May 2020 10:52:29 +0000	[thread overview]
Message-ID: <SN6PR11MB25752EA2FF75768D84C14360F6B60@SN6PR11MB2575.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20200518142143.GB3594@bogus>


> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Monday, May 18, 2020 10:22 PM
> To: G Jaya Kumaran, Vineetha <vineetha.g.jaya.kumaran@intel.com>
> Cc: thierry.reding@gmail.com; u.kleine-koenig@pengutronix.de; linux-
> pwm@vger.kernel.org; devicetree@vger.kernel.org; Wan Mohamad, Wan
> Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>; Shevchenko,
> Andriy <andriy.shevchenko@intel.com>
> Subject: Re: [PATCH 3/3] dt-bindings: pwm: keembay: Add bindings for Intel
> Keem Bay PWM
> 
> On Sun, May 17, 2020 at 09:52:40PM +0800,
> vineetha.g.jaya.kumaran@intel.com wrote:
> > From: "Vineetha G. Jaya Kumaran" <vineetha.g.jaya.kumaran@intel.com>
> >
> > Add PWM Device Tree bindings documentation for the Intel Keem Bay SoC.
> >
> > Signed-off-by: Vineetha G. Jaya Kumaran
> > <vineetha.g.jaya.kumaran@intel.com>
> > ---
> >  .../devicetree/bindings/pwm/pwm-keembay.yaml       | 39
> ++++++++++++++++++++++
> >  1 file changed, 39 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/pwm/pwm-keembay.yaml
> 
> Use compatible string for filename: intel,keembay-pwn.yaml
> 

Will fix the filename in v2.

> >
> > diff --git a/Documentation/devicetree/bindings/pwm/pwm-keembay.yaml
> > b/Documentation/devicetree/bindings/pwm/pwm-keembay.yaml
> > new file mode 100644
> > index 0000000..00968d7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pwm/pwm-keembay.yaml
> > @@ -0,0 +1,39 @@
> > +# SPDX-License-Identifier: GPL-2.0
> 
> Dual license new bindings:
> 
> (GPL-2.0-only OR BSD-2-Clause)
> 

OK, will update the licensing info.

> > +# Copyright (C) 2020 Intel Corporation %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pwm/pwm-keembay.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Intel Keem Bay PWM Device Tree Bindings
> > +
> > +maintainers:
> > +  - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
> > +
> > +allOf:
> > +  - $ref: pwm.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - intel,keembay-pwm
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    description:
> > +        phandle to the reference clock.
> 
> How many clocks? (maxItems: 1?)
> 
> You can drop the description.
> 

1 clock is needed for this case, will add in maxItems and drop the description.

> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > +
> > +examples:
> > +  - |
> > +    pwm@203200a0 {
> > +      compatible = "intel,keembay-pwm";
> > +      reg = <0x0 0x203200a0 0x0 0xe8>;
> > +      clocks = <&scmi_clk KEEM_BAY_A53_GPIO>;
> > +    };
> > --
> > 1.9.1
> >

      reply	other threads:[~2020-05-20 10:52 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-17 13:52 [PATCH 0/3] Add PWM support for Intel Keem Bay SoC vineetha.g.jaya.kumaran
2020-05-17 13:52 ` [PATCH 1/3] pwm: Add count attribute in sysfs for Intel Keem Bay vineetha.g.jaya.kumaran
2020-05-23 21:05   ` Uwe Kleine-König
2020-06-05 13:49     ` G Jaya Kumaran, Vineetha
2020-05-17 13:52 ` [PATCH 2/3] pwm: Add PWM driver " vineetha.g.jaya.kumaran
2020-05-23 21:40   ` Uwe Kleine-König
2020-06-05 13:48     ` G Jaya Kumaran, Vineetha
2020-05-17 13:52 ` [PATCH 3/3] dt-bindings: pwm: keembay: Add bindings for Intel Keem Bay PWM vineetha.g.jaya.kumaran
2020-05-18 14:18   ` Rob Herring
2020-05-20 10:49     ` G Jaya Kumaran, Vineetha
2020-05-18 14:21   ` Rob Herring
2020-05-20 10:52     ` G Jaya Kumaran, Vineetha [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=SN6PR11MB25752EA2FF75768D84C14360F6B60@SN6PR11MB2575.namprd11.prod.outlook.com \
    --to=vineetha.g.jaya.kumaran@intel.com \
    --cc=andriy.shevchenko@intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=robh@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=u.kleine-koenig@pengutronix.de \
    --cc=wan.ahmad.zainie.wan.mohamad@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).