From: Robin Murphy <robin.murphy@arm.com>
To: Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: devicetree@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Diana Craciun <diana.craciun@oss.nxp.com>,
PCI <linux-pci@vger.kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Makarand Pawagi <makarand.pawagi@nxp.com>,
linux-acpi@vger.kernel.org,
Linux IOMMU <iommu@lists.linux-foundation.org>,
Marc Zyngier <maz@kernel.org>, Hanjun Guo <guohanjun@huawei.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus
Date: Fri, 22 May 2020 10:42:45 +0100 [thread overview]
Message-ID: <abca6ecb-5d93-832f-ff7c-de53bb6203f3@arm.com> (raw)
In-Reply-To: <CAL_Jsq+h18gH2D3B-OZku6ACCgonPUJcUnrN8a5=jApsXHdB5Q@mail.gmail.com>
On 2020-05-22 00:10, Rob Herring wrote:
> On Thu, May 21, 2020 at 7:00 AM Lorenzo Pieralisi
> <lorenzo.pieralisi@arm.com> wrote:
>>
>> From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>>
>> The existing bindings cannot be used to specify the relationship
>> between fsl-mc devices and GIC ITSes.
>>
>> Add a generic binding for mapping fsl-mc devices to GIC ITSes, using
>> msi-map property.
>>
>> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> ---
>> .../devicetree/bindings/misc/fsl,qoriq-mc.txt | 30 +++++++++++++++++--
>> 1 file changed, 27 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
>> index 9134e9bcca56..b0813b2d0493 100644
>> --- a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
>> +++ b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
>> @@ -18,9 +18,9 @@ same hardware "isolation context" and a 10-bit value called an ICID
>> the requester.
>>
>> The generic 'iommus' property is insufficient to describe the relationship
>> -between ICIDs and IOMMUs, so an iommu-map property is used to define
>> -the set of possible ICIDs under a root DPRC and how they map to
>> -an IOMMU.
>> +between ICIDs and IOMMUs, so the iommu-map and msi-map properties are used
>> +to define the set of possible ICIDs under a root DPRC and how they map to
>> +an IOMMU and a GIC ITS respectively.
>>
>> For generic IOMMU bindings, see
>> Documentation/devicetree/bindings/iommu/iommu.txt.
>> @@ -28,6 +28,9 @@ Documentation/devicetree/bindings/iommu/iommu.txt.
>> For arm-smmu binding, see:
>> Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
>>
>> +For GICv3 and GIC ITS bindings, see:
>> +Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml.
>> +
>> Required properties:
>>
>> - compatible
>> @@ -119,6 +122,15 @@ Optional properties:
>> associated with the listed IOMMU, with the iommu-specifier
>> (i - icid-base + iommu-base).
>>
>> +- msi-map: Maps an ICID to a GIC ITS and associated iommu-specifier
>> + data.
>> +
>> + The property is an arbitrary number of tuples of
>> + (icid-base,iommu,iommu-base,length).
>
> I'm confused because the example has GIC ITS phandle, not an IOMMU.
>
> What is an iommu-base?
Right, I was already halfway through writing a reply to say that all the
copy-pasted "iommu" references here should be using the terminology from
the pci-msi.txt binding instead.
>> +
>> + Any ICID in the interval [icid-base, icid-base + length) is
>> + associated with the listed GIC ITS, with the iommu-specifier
>> + (i - icid-base + iommu-base).
>> Example:
>>
>> smmu: iommu@5000000 {
>> @@ -128,6 +140,16 @@ Example:
>> ...
>> };
>>
>> + gic: interrupt-controller@6000000 {
>> + compatible = "arm,gic-v3";
>> + ...
>> + its: gic-its@6020000 {
>> + compatible = "arm,gic-v3-its";
>> + msi-controller;
>> + ...
>> + };
>> + };
>> +
>> fsl_mc: fsl-mc@80c000000 {
>> compatible = "fsl,qoriq-mc";
>> reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
>> @@ -135,6 +157,8 @@ Example:
>> msi-parent = <&its>;
Side note: is it right to keep msi-parent here? It rather implies that
the MC itself has a 'native' Device ID rather than an ICID, which I
believe is not strictly true. Plus it's extra-confusing that it doesn't
specify an ID either way, since that makes it look like the legacy PCI
case that gets treated implicitly as an identity msi-map, which makes no
sense at all to combine with an actual msi-map.
>> /* define map for ICIDs 23-64 */
>> iommu-map = <23 &smmu 23 41>;
>> + /* define msi map for ICIDs 23-64 */
>> + msi-map = <23 &its 23 41>;
>
> Seeing 23 twice is odd. The numbers to the right of 'its' should be an
> ITS number space.
On about 99% of systems the values in the SMMU Stream ID and ITS Device
ID spaces are going to be the same. Nobody's going to bother carrying
*two* sets of sideband data across the interconnect if they don't have to ;)
Robin.
>> #address-cells = <3>;
>> #size-cells = <1>;
>>
>> --
>> 2.26.1
>>
> _______________________________________________
> iommu mailing list
> iommu@lists.linux-foundation.org
> https://lists.linuxfoundation.org/mailman/listinfo/iommu
>
next prev parent reply other threads:[~2020-05-22 9:42 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 12:59 [PATCH 00/12] ACPI/OF: Upgrade MSI/IOMMU ID mapping APIs Lorenzo Pieralisi
2020-05-21 12:59 ` [PATCH 01/12] ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC Lorenzo Pieralisi
2020-05-21 12:59 ` [PATCH 02/12] ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic Lorenzo Pieralisi
2020-05-21 19:56 ` Bjorn Helgaas
2020-05-21 12:59 ` [PATCH 03/12] ACPI/IORT: Make iort_msi_map_rid() PCI agnostic Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 04/12] ACPI/IORT: Remove useless PCI bus walk Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 05/12] ACPI/IORT: Add an input ID to acpi_dma_configure() Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 06/12] of/iommu: Make of_map_rid() PCI agnostic Lorenzo Pieralisi
2020-05-21 22:47 ` Rob Herring
2020-06-04 14:27 ` Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 07/12] of/device: Add input id to of_dma_configure() Lorenzo Pieralisi
2020-05-21 23:02 ` Rob Herring
2020-06-04 14:49 ` Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 08/12] of/irq: make of_msi_map_get_device_domain() bus agnostic Lorenzo Pieralisi
2020-05-21 19:57 ` Bjorn Helgaas
2020-05-21 13:00 ` [PATCH 09/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus Lorenzo Pieralisi
2020-05-21 23:10 ` Rob Herring
2020-05-22 9:42 ` Robin Murphy [this message]
2020-05-22 9:57 ` Diana Craciun OSS
2020-05-22 14:08 ` Rob Herring
2020-05-22 14:34 ` Robin Murphy
2020-05-22 14:02 ` Rob Herring
2020-05-22 15:38 ` Laurentiu Tudor
2020-05-21 13:00 ` [PATCH 10/12] of/irq: Make of_msi_map_rid() PCI bus agnostic Lorenzo Pieralisi
2020-05-21 23:17 ` Rob Herring
2020-06-04 15:08 ` Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 11/12] bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver Lorenzo Pieralisi
2020-05-21 13:00 ` [PATCH 12/12] bus: fsl-mc: Add ACPI support for fsl-mc Lorenzo Pieralisi
2020-05-21 15:03 ` Laurentiu Tudor
2020-05-22 5:32 ` Makarand Pawagi
2020-05-22 9:53 ` Lorenzo Pieralisi
2020-06-19 8:20 ` [PATCH v2 00/12] ACPI/OF: Upgrade MSI/IOMMU ID mapping APIs Lorenzo Pieralisi
2020-06-19 8:20 ` [PATCH v2 01/12] ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC Lorenzo Pieralisi
2020-06-29 4:24 ` Hanjun Guo
2020-06-29 9:05 ` Lorenzo Pieralisi
2020-06-30 3:06 ` Hanjun Guo
2020-06-30 10:24 ` Lorenzo Pieralisi
2020-06-30 13:04 ` Hanjun Guo
2020-07-01 16:12 ` Robin Murphy
2020-07-02 8:22 ` Hanjun Guo
2020-07-09 9:21 ` Lorenzo Pieralisi
2020-07-09 12:48 ` Hanjun Guo
2020-08-18 0:49 ` Hanjun Guo
2020-06-19 8:20 ` [PATCH v2 02/12] ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic Lorenzo Pieralisi
2020-06-19 8:20 ` [PATCH v2 03/12] ACPI/IORT: Make iort_msi_map_rid() PCI agnostic Lorenzo Pieralisi
2020-07-15 9:15 ` Lorenzo Pieralisi
2020-07-21 14:59 ` Bjorn Helgaas
2020-07-27 6:06 ` [EXT] " Makarand Pawagi
2020-06-19 8:20 ` [PATCH v2 04/12] ACPI/IORT: Remove useless PCI bus walk Lorenzo Pieralisi
2020-06-19 8:20 ` [PATCH v2 05/12] ACPI/IORT: Add an input ID to acpi_dma_configure() Lorenzo Pieralisi
2020-07-09 9:35 ` Lorenzo Pieralisi
2020-07-15 9:13 ` Lorenzo Pieralisi
2020-07-28 12:48 ` Lorenzo Pieralisi
2020-07-28 13:00 ` Rafael J. Wysocki
2020-06-19 8:20 ` [PATCH v2 06/12] of/iommu: Make of_map_rid() PCI agnostic Lorenzo Pieralisi
2020-06-22 13:26 ` Joerg Roedel
2020-07-13 23:57 ` Rob Herring
2020-06-19 8:20 ` [PATCH v2 07/12] of/device: Add input id to of_dma_configure() Lorenzo Pieralisi
2020-06-30 21:50 ` Rob Herring
2020-06-19 8:20 ` [PATCH v2 08/12] dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus Lorenzo Pieralisi
2020-06-30 21:55 ` Rob Herring
2020-06-19 8:20 ` [PATCH v2 09/12] of/irq: make of_msi_map_get_device_domain() bus agnostic Lorenzo Pieralisi
2020-06-30 21:50 ` Rob Herring
2020-06-19 8:20 ` [PATCH v2 10/12] of/irq: Make of_msi_map_rid() PCI " Lorenzo Pieralisi
2020-06-30 21:56 ` Rob Herring
2020-06-19 8:20 ` [PATCH v2 11/12] bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver Lorenzo Pieralisi
2020-07-15 13:05 ` Marc Zyngier
2020-06-19 8:20 ` [PATCH v2 12/12] bus: fsl-mc: Add ACPI support for fsl-mc Lorenzo Pieralisi
2020-07-01 16:55 ` Laurentiu Tudor
2020-07-09 9:19 ` Lorenzo Pieralisi
2020-07-09 9:26 ` [EXT] " Makarand Pawagi
2020-07-09 10:14 ` Laurentiu Tudor
2020-07-09 10:37 ` Makarand Pawagi
2020-07-09 10:39 ` Laurentiu Tudor
2020-07-09 10:47 ` Diana Craciun OSS
2020-07-09 10:52 ` Makarand Pawagi
2020-07-15 10:06 ` Lorenzo Pieralisi
2020-07-16 3:23 ` Makarand Pawagi
2020-07-16 7:57 ` Marc Zyngier
2020-07-20 16:54 ` [PATCH v2 00/12] ACPI/OF: Upgrade MSI/IOMMU ID mapping APIs Lorenzo Pieralisi
2020-07-21 4:28 ` [EXT] " Makarand Pawagi
2020-07-28 17:01 ` Catalin Marinas
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