From: Philipp Zabel <p.zabel@pengutronix.de>
To: Jun Nie <jun.nie@linaro.org>,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, xuwei5@hisilicon.com,
opensource@jilayne.com, swinslow@gmail.com, allison@lohutok.net,
yuehaibing@huawei.com, tglx@linutronix.de,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, xuejiancheng@hisilicon.com
Subject: Re: [PATCH 1/3] dt-bindings: clock: Update Hisilicon reset doc
Date: Mon, 02 Dec 2019 18:04:11 +0100 [thread overview]
Message-ID: <cd0fae1a6b88a37e034876b53b350e79f58c654f.camel@pengutronix.de> (raw)
In-Reply-To: <20191202144524.5391-2-jun.nie@linaro.org>
Hi Jun,
I have a few questions and comments about these patches. I notice that
the changed device trees only use the default setting. Are these new
features something that is required for the present SoCs, or is this in
preparation for a new SoC?
On Mon, 2019-12-02 at 22:45 +0800, Jun Nie wrote:
> Document the update of Hisilicon reset operation extension.
>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> ---
> .../devicetree/bindings/clock/hisi-crg.txt | 12 ++++----
> include/dt-bindings/reset/hisilicon-resets.h | 28 +++++++++++++++++++
> 2 files changed, 35 insertions(+), 5 deletions(-)
> create mode 100644 include/dt-bindings/reset/hisilicon-resets.h
>
> diff --git a/Documentation/devicetree/bindings/clock/hisi-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt
> index cc60b3d423f3..fd8b0a964806 100644
> --- a/Documentation/devicetree/bindings/clock/hisi-crg.txt
> +++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt
> @@ -26,19 +26,21 @@ to specify the clock which they consume.
>
> All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>.
>
> -- #reset-cells: should be 2.
> +- #reset-cells: should be 3.
>
> A reset signal can be controlled by writing a bit register in the CRG module.
> -The reset specifier consists of two cells. The first cell represents the
> +The reset specifier consists of three cells. The first cell represents the
> register offset relative to the base address. The second cell represents the
> -bit index in the register.
> +bit index in the register. The third represent the flags to operation type.
> +
> +All reset flags could be found in <dt-bindings/reset/hisilicon-resets.h>
>
> Example: CRG nodes
> CRG: clock-reset-controller@12010000 {
> compatible = "hisilicon,hi3519-crg";
> reg = <0x12010000 0x10000>;
> #clock-cells = <1>;
> - #reset-cells = <2>;
> + #reset-cells = <3>;
> };
>
> Example: consumer nodes
> @@ -46,5 +48,5 @@ i2c0: i2c@12110000 {
> compatible = "hisilicon,hi3519-i2c";
> reg = <0x12110000 0x1000>;
> clocks = <&CRG HI3519_I2C0_RST>;
> - resets = <&CRG 0xe4 0>;
> + resets = <&CRG 0xe4 0 (HISI_ASSERT_SET | HISI_DEASSERT_CLEAR)>;
> };
> diff --git a/include/dt-bindings/reset/hisilicon-resets.h b/include/dt-bindings/reset/hisilicon-resets.h
> new file mode 100644
> index 000000000000..983e42a0c318
> --- /dev/null
> +++ b/include/dt-bindings/reset/hisilicon-resets.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Hisilicon Reset definitions
> + *
> + * Copyright (c) 2019 HiSilicon Technologies Co., Ltd.
> + */
> +
> +#ifndef __DT_BINDINGS_RESET_HISILICON_H__
> +#define __DT_BINDINGS_RESET_HISILICON_H__
> +
> +/*
> + * The reset does not support the feature and corresponding
> + * values are not valid
> + */
> +#define HISI_ASSERT_NONE (1 << 0)
> +#define HISI_DEASSERT_NONE (1 << 1)
What is the purpose of these two? Surely a reset control that does
nothing is not useful?
> +
> +/* When set this function is activated by polling/setting/clearing this bit */
> +#define HISI_ASSERT_SET (1 << 2)
> +#define HISI_DEASSERT_SET (1 << 3)
> +#define HISI_ASSERT_CLEAR (0 << 4)
> +#define HISI_DEASSERT_CLEAR (0 << 5)
> +#define HISI_ASSERT_POLL (0 << 6)
> +#define HISI_DEASSERT_POLL (0 << 7)
These are all zero, checking for them with an & operation in the code
always returns false.
> +
> +#define HISI_RESET_DEFAULT (HISI_ASSERT_SET | HISI_DEASSERT_CLEAR)
> +
> +#endif
regards
Philipp
next prev parent reply other threads:[~2019-12-02 17:04 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 14:45 [PATCH 0/3] Extend Hisilicon reset type Jun Nie
2019-12-02 14:45 ` [PATCH 1/3] dt-bindings: clock: Update Hisilicon reset doc Jun Nie
2019-12-02 17:04 ` Philipp Zabel [this message]
2019-12-03 3:11 ` Jun Nie
2019-12-03 14:12 ` Philipp Zabel
2019-12-02 14:45 ` [PATCH 2/3] reset: hisilicon: Extend reset operation type Jun Nie
2019-12-02 17:04 ` Philipp Zabel
2019-12-03 3:53 ` Jun Nie
2019-12-03 14:15 ` Philipp Zabel
2019-12-04 6:09 ` Jun Nie
2019-12-02 14:45 ` [PATCH 3/3] ARM: dts: Update reset for hi3519 and hi3798cv200 Jun Nie
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cd0fae1a6b88a37e034876b53b350e79f58c654f.camel@pengutronix.de \
--to=p.zabel@pengutronix.de \
--cc=allison@lohutok.net \
--cc=devicetree@vger.kernel.org \
--cc=jun.nie@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=opensource@jilayne.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=swinslow@gmail.com \
--cc=tglx@linutronix.de \
--cc=xuejiancheng@hisilicon.com \
--cc=xuwei5@hisilicon.com \
--cc=yuehaibing@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).