RE: [PATCH net-next 3/9] net: phy: add kr phy connection type

["Madalin Bucur (OSS)" <madalin.bucur@oss.nxp.com>]

> -----Original Message-----
> From: netdev-owner@vger.kernel.org <netdev-owner@vger.kernel.org> On
> Behalf Of Russell King - ARM Linux admin
> Sent: Friday, March 27, 2020 2:02 PM
> To: Andrew Lunn <andrew@lunn.ch>
> Cc: Florinel Iordache <florinel.iordache@nxp.com>; davem@davemloft.net;
> netdev@vger.kernel.org; f.fainelli@gmail.com; hkallweit1@gmail.com;
> devicetree@vger.kernel.org; linux-doc@vger.kernel.org; robh+dt@kernel.org;
> mark.rutland@arm.com; kuba@kernel.org; corbet@lwn.net;
> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; Madalin Bucur (OSS)
> <madalin.bucur@oss.nxp.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH net-next 3/9] net: phy: add kr phy connection type
> 
> On Fri, Mar 27, 2020 at 01:15:15AM +0100, Andrew Lunn wrote:
> > On Thu, Mar 26, 2020 at 03:51:16PM +0200, Florinel Iordache wrote:
> > > Add support for backplane kr phy connection types currently available
> > > (10gbase-kr, 40gbase-kr4) and the required phylink updates (cover all
> > > the cases for KR modes which are clause 45 compatible to correctly
> assign
> > > phy_interface and phylink#supported)
> > >
> > > Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
> > > ---
> > >  drivers/net/phy/phylink.c | 15 ++++++++++++---
> > >  include/linux/phy.h       |  6 +++++-
> > >  2 files changed, 17 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> > > index fed0c59..db1bb87 100644
> > > --- a/drivers/net/phy/phylink.c
> > > +++ b/drivers/net/phy/phylink.c
> > > @@ -4,6 +4,7 @@
> > >   * technologies such as SFP cages where the PHY is hot-pluggable.
> > >   *
> > >   * Copyright (C) 2015 Russell King
> > > + * Copyright 2020 NXP
> > >   */
> > >  #include <linux/ethtool.h>
> > >  #include <linux/export.h>
> > > @@ -303,7 +304,6 @@ static int phylink_parse_mode(struct phylink *pl,
> struct fwnode_handle *fwnode)
> > >  			break;
> > >
> > >  		case PHY_INTERFACE_MODE_USXGMII:
> > > -		case PHY_INTERFACE_MODE_10GKR:
> >
> > We might have a backwards compatibility issue here. If i remember
> > correctly, there are some boards out in the wild using
> > PHY_INTERFACE_MODE_10GKR not PHY_INTERFACE_MODE_10GBASER.
> >
> > See e0f909bc3a242296da9ccff78277f26d4883a79d
> >
> > Russell, what do you say about this?
> 
> Yes, and that's a point that I made when I introduced 10GBASER to
> correct that mistake.  It is way too soon to change this; it will
> definitely cause regressions:
> 
> $ grep 10gbase-kr arch/*/boot/dts -r
> arch/arm64/boot/dts/marvell/cn9131-db.dts:      phy-mode = "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts:      phy-mode =
> "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts:      phy-mode =
> "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-7040-db.dts:    phy-mode = "10gbase-
> kr";
> arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts:   phy-mode =
> "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts:   phy-mode =
> "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts:     phy-mode =
> "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-db.dts: phy-mode = "10gbase-kr";
> arch/arm64/boot/dts/marvell/armada-8040-db.dts: phy-mode = "10gbase-kr";
> arch/arm64/boot/dts/marvell/cn9132-db.dts:      phy-mode = "10gbase-kr";
> arch/arm64/boot/dts/marvell/cn9130-db.dts:      phy-mode = "10gbase-kr";
> 
> So any change to the existing PHY_INTERFACE_MODE_10GKR will likely
> break all these platforms.
> 
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps
> up

Hi Russell,

I hoped a fix for those would be in by now, it's not useful to leave them like
that. We have a similar situation, where all boards using XFI interfaces contain
phy-connection-type="xgmii" for a long time now but that did not stop anyone from
adding a warning in the Aquantia driver:

+       WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
+            "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
+

Maybe we need a warning added here too, until the proper phy-mode is used for
these boards, to allow for a transition period.

Madalin