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From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"bp@suse.de" <bp@suse.de>,
	"tony.luck@intel.com" <tony.luck@intel.com>,
	"x86@kernel.org" <x86@kernel.org>
Subject: [PATCH v4 1/5] x86/MCE: Make struct mce_banks[] static
Date: Fri, 7 Jun 2019 20:18:03 +0000	[thread overview]
Message-ID: <20190607201752.221446-2-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20190607201752.221446-1-Yazen.Ghannam@amd.com>

From: Yazen Ghannam <yazen.ghannam@amd.com>

The struct mce_banks[] array is only used in mce/core.c so move its
definition there and make it static. Also, change the "init" field to
bool type.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20190430203206.104163-2-Yazen.Ghannam@amd.com

v3->v4:
* No changes

v2->v3:
* No changes

v1->v2:
* No changes

 arch/x86/kernel/cpu/mce/core.c     | 11 ++++++++++-
 arch/x86/kernel/cpu/mce/internal.h | 10 ----------
 2 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 282916f3b8d8..55bdbedde0b8 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -65,7 +65,16 @@ static DEFINE_MUTEX(mce_sysfs_mutex);
 
 DEFINE_PER_CPU(unsigned, mce_exception_count);
 
-struct mce_bank *mce_banks __read_mostly;
+#define ATTR_LEN               16
+/* One object for each MCE bank, shared by all CPUs */
+struct mce_bank {
+	u64			ctl;			/* subevents to enable */
+	bool			init;			/* initialise bank? */
+	struct device_attribute	attr;			/* device attribute */
+	char			attrname[ATTR_LEN];	/* attribute name */
+};
+
+static struct mce_bank *mce_banks __read_mostly;
 struct mce_vendor_flags mce_flags __read_mostly;
 
 struct mca_config mca_cfg __read_mostly = {
diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h
index a34b55baa7aa..35b3e5c02c1c 100644
--- a/arch/x86/kernel/cpu/mce/internal.h
+++ b/arch/x86/kernel/cpu/mce/internal.h
@@ -22,17 +22,8 @@ enum severity_level {
 
 extern struct blocking_notifier_head x86_mce_decoder_chain;
 
-#define ATTR_LEN		16
 #define INITIAL_CHECK_INTERVAL	5 * 60 /* 5 minutes */
 
-/* One object for each MCE bank, shared by all CPUs */
-struct mce_bank {
-	u64			ctl;			/* subevents to enable */
-	unsigned char init;				/* initialise bank? */
-	struct device_attribute attr;			/* device attribute */
-	char			attrname[ATTR_LEN];	/* attribute name */
-};
-
 struct mce_evt_llist {
 	struct llist_node llnode;
 	struct mce mce;
@@ -47,7 +38,6 @@ struct llist_node *mce_gen_pool_prepare_records(void);
 extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp);
 struct dentry *mce_get_debugfs_dir(void);
 
-extern struct mce_bank *mce_banks;
 extern mce_banks_t mce_banks_ce_disabled;
 
 #ifdef CONFIG_X86_MCE_INTEL
-- 
2.17.1


  reply	other threads:[~2019-06-07 20:18 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-07 20:18 [PATCH v4 0/5] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-06-07 20:18 ` Ghannam, Yazen [this message]
2019-06-11 16:22   ` [tip:ras/core] x86/MCE: Make struct mce_banks[] static tip-bot for Yazen Ghannam
2019-06-07 20:18 ` [PATCH v4 2/5] x86/MCE: Make mce_banks a per-CPU array Ghannam, Yazen
2019-06-11 16:23   ` [tip:ras/core] " tip-bot for Yazen Ghannam
2019-06-07 20:18 ` [PATCH v4 3/5] x86/MCE/AMD: Don't cache block addresses on SMCA systems Ghannam, Yazen
2019-06-11 16:24   ` [tip:ras/core] " tip-bot for Yazen Ghannam
2019-06-07 20:18 ` [PATCH v4 4/5] x86/MCE: Make the number of MCA banks a per-CPU variable Ghannam, Yazen
2019-06-11 16:25   ` [tip:ras/core] " tip-bot for Yazen Ghannam
2019-06-07 20:18 ` [PATCH v4 5/5] x86/MCE: Determine MCA banks' init state properly Ghannam, Yazen
2019-06-11 16:25   ` [tip:ras/core] " tip-bot for Yazen Ghannam

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