From: Yazen Ghannam <Yazen.Ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>,
linux-kernel@vger.kernel.org, tony.luck@intel.com,
x86@kernel.org, Smita.KoralahalliChannabasappa@amd.com
Subject: [PATCH 14/25] x86/MCE/AMD: Define function to get number of interleaved channels
Date: Fri, 7 May 2021 15:01:29 -0400 [thread overview]
Message-ID: <20210507190140.18854-15-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20210507190140.18854-1-Yazen.Ghannam@amd.com>
From: Yazen Ghannam <yazen.ghannam@amd.com>
Move number of interleaved channel calculation to a separate helper
function. Drop unused cases.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kernel/cpu/mce/amd.c | 42 +++++++++++++++++++----------------
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 605376351cc8..0c24bdc346a3 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -729,6 +729,7 @@ struct addr_ctx {
u8 umc;
u8 map_num;
u8 intlv_addr_bit;
+ u8 intlv_num_chan;
u8 cs_id;
bool hash_enabled;
};
@@ -830,12 +831,29 @@ static int get_intlv_addr_bit(struct addr_ctx *ctx)
return 0;
}
+static void get_intlv_num_chan(struct addr_ctx *ctx)
+{
+ /* Save the log2(# of channels). */
+ switch (ctx->intlv_mode) {
+ case NONE:
+ ctx->intlv_num_chan = 0;
+ break;
+ case NOHASH_2CH:
+ case DF2_HASH_2CH:
+ ctx->intlv_num_chan = 1;
+ break;
+ default:
+ /* Valid interleaving modes where checked earlier. */
+ break;
+ }
+}
+
static int denormalize_addr(struct addr_ctx *ctx)
{
u32 tmp;
u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
- u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets;
+ u8 intlv_num_dies, intlv_num_sockets;
u8 num_intlv_bits, cs_mask = 0;
/* Return early if no interleaving. */
@@ -848,23 +866,9 @@ static int denormalize_addr(struct addr_ctx *ctx)
intlv_num_sockets = (ctx->reg_limit_addr >> 8) & 0x1;
intlv_num_dies = (ctx->reg_limit_addr >> 10) & 0x3;
- /* Re-use intlv_num_chan by setting it equal to log2(#channels) */
- switch (intlv_num_chan) {
- case 0: intlv_num_chan = 0; break;
- case 1: intlv_num_chan = 1; break;
- case 3: intlv_num_chan = 2; break;
- case 5: intlv_num_chan = 3; break;
- case 7: intlv_num_chan = 4; break;
-
- case 8: intlv_num_chan = 1;
- break;
- default:
- pr_err("%s: Invalid number of interleaved channels %d.\n",
- __func__, intlv_num_chan);
- return -EINVAL;
- }
+ get_intlv_num_chan(ctx);
- num_intlv_bits = intlv_num_chan;
+ num_intlv_bits = ctx->intlv_num_chan;
if (intlv_num_dies > 2) {
pr_err("%s: Invalid number of interleaved nodes/dies %d.\n",
@@ -901,8 +905,8 @@ static int denormalize_addr(struct addr_ctx *ctx)
die_id_bit = 0;
/* If interleaved over more than 1 channel: */
- if (intlv_num_chan) {
- die_id_bit = intlv_num_chan;
+ if (ctx->intlv_num_chan) {
+ die_id_bit = ctx->intlv_num_chan;
cs_mask = (1 << die_id_bit) - 1;
ctx->cs_id = cs_fabric_id & cs_mask;
}
--
2.25.1
next prev parent reply other threads:[~2021-05-07 19:02 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 19:01 [PATCH 00/25] AMD MCA Address Translation Updates Yazen Ghannam
2021-05-07 19:01 ` [PATCH 01/25] x86/MCE/AMD: Don't use naked values for DF registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 02/25] x86/MCE/AMD: Add context struct Yazen Ghannam
2021-05-07 19:01 ` [PATCH 03/25] x86/MCE/AMD: Define functions for DramOffset Yazen Ghannam
2021-05-07 19:01 ` [PATCH 04/25] x86/MCE/AMD: Define function to read DRAM address map registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 05/25] x86/MCE/AMD: Define function to find interleaving mode Yazen Ghannam
2021-05-07 19:01 ` [PATCH 06/25] x86/MCE/AMD: Define function to denormalize address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 07/25] x86/MCE/AMD: Define function to add DRAM base and hole Yazen Ghannam
2021-05-07 19:01 ` [PATCH 08/25] x86/MCE/AMD: Define function to dehash address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 09/25] x86/MCE/AMD: Define function to check DRAM limit address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 10/25] x86/MCE/AMD: Remove goto statements Yazen Ghannam
2021-05-07 19:01 ` [PATCH 11/25] x86/MCE/AMD: Simplify function parameters Yazen Ghannam
2021-05-07 19:01 ` [PATCH 12/25] x86/MCE/AMD: Define function to get Interleave Address Bit Yazen Ghannam
2021-05-07 19:01 ` [PATCH 13/25] x86/MCE/AMD: Skip denormalization if no interleaving Yazen Ghannam
2021-05-07 19:01 ` Yazen Ghannam [this message]
2021-05-07 19:01 ` [PATCH 15/25] x86/MCE/AMD: Define function to get number of interleaved dies Yazen Ghannam
2021-05-07 19:01 ` [PATCH 16/25] x86/MCE/AMD: Define function to get number of interleaved sockets Yazen Ghannam
2021-05-07 19:01 ` [PATCH 17/25] x86/MCE/AMD: Remove unnecessary assert Yazen Ghannam
2021-05-07 19:01 ` [PATCH 18/25] x86/MCE/AMD: Define function to make space for CS ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 19/25] x86/MCE/AMD: Define function to calculate " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 20/25] x86/MCE/AMD: Define function to insert CS ID into address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 21/25] x86/MCE/AMD: Define function to get CS Fabric ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 22/25] x86/MCE/AMD: Define function to find shift and mask values Yazen Ghannam
2021-05-07 19:01 ` [PATCH 23/25] x86/MCE/AMD: Update CS ID calculation to match reference code Yazen Ghannam
2021-05-07 19:01 ` [PATCH 24/25] x86/MCE/AMD: Match hash function to " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 25/25] x86/MCE/AMD: Add support for address translation on DF3 systems Yazen Ghannam
2021-05-07 20:32 ` [PATCH 00/25] AMD MCA Address Translation Updates Randy Dunlap
2021-05-11 15:42 ` Yazen Ghannam
2021-05-11 16:13 ` Randy Dunlap
2021-05-11 16:28 ` Borislav Petkov
2021-05-17 12:57 ` Borislav Petkov
2021-05-19 3:52 ` Yazen Ghannam
2021-05-19 14:32 ` Borislav Petkov
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