From: Paul Walmsley <paul.walmsley@sifive.com>
To: Christoph Hellwig <hch@lst.de>
Cc: palmer@sifive.com, bp@alien8.de, mchehab@kernel.org,
linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/soc
Date: Fri, 6 Sep 2019 15:36:09 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1909061533260.6292@viisi.sifive.com> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1909061525040.6292@viisi.sifive.com>
One other comment on this patch:
On Fri, 6 Sep 2019, Paul Walmsley wrote:
> On Sun, 18 Aug 2019, Christoph Hellwig wrote:
>
> > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
> > index 200c04ce5b0e..9241b3e7a050 100644
> > --- a/drivers/edac/Kconfig
> > +++ b/drivers/edac/Kconfig
> > @@ -462,7 +462,7 @@ config EDAC_ALTERA_SDMMC
> >
> > config EDAC_SIFIVE
> > bool "Sifive platform EDAC driver"
> > - depends on EDAC=y && RISCV
> > + depends on EDAC=y && SIFIVE_L2
Since the guidance from the EDAC maintainers is that this driver is to be
a platform driver -- which would, for example, also include EDAC support for
other IP blocks (e.g., DRAM controllers) on SiFive SoCs -- this should
depend on SOC_SIFIVE, not SIFIVE_L2.
- Paul
next prev parent reply other threads:[~2019-09-06 22:36 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-18 8:29 [PATCH] riscv: move sifive_l2_cache.c to drivers/soc Christoph Hellwig
2019-08-19 4:44 ` Anup Patel
2019-08-19 6:09 ` Borislav Petkov
2019-08-19 6:26 ` Christoph Hellwig
2019-08-20 6:03 ` Yash Shah
2019-08-22 9:26 ` Mauro Carvalho Chehab
2019-08-31 2:53 ` Paul Walmsley
2019-09-01 8:00 ` Christoph Hellwig
2019-09-27 22:53 ` Christoph Hellwig
2019-10-17 17:19 ` Christoph Hellwig
2019-09-06 22:33 ` Paul Walmsley
2019-09-07 4:42 ` Christoph Hellwig
2019-09-06 22:27 ` Paul Walmsley
2019-09-06 22:36 ` Paul Walmsley [this message]
2019-09-07 4:40 ` Christoph Hellwig
2019-09-07 4:39 ` Christoph Hellwig
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