From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
Zhen Lei <thunder.leizhen@huawei.com>,
Russell King <rmk+kernel@armlinux.org.uk>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Linus Walleij <linus.walleij@linaro.org>,
Nicolas Pitre <nico@fluxnic.net>
Subject: [RFC/RFT PATCH 1/6] ARM: p2v: factor out shared loop processing
Date: Fri, 18 Sep 2020 13:30:57 +0300 [thread overview]
Message-ID: <20200918103102.18107-2-ardb@kernel.org> (raw)
In-Reply-To: <20200918103102.18107-1-ardb@kernel.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/kernel/head.S | 24 +++++++++-----------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f8904227e7fd..9a0c11ac8281 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -641,7 +641,7 @@ __fixup_a_pv_table:
#ifdef CONFIG_THUMB2_KERNEL
moveq r0, #0x200000 @ set bit 21, mov to mvn instruction
lsls r6, #24
- beq 2f
+ beq .Lnext
clz r7, r6
lsr r6, #24
lsl r6, r7
@@ -650,8 +650,8 @@ __fixup_a_pv_table:
orrcs r6, #0x0080
orr r6, r6, r7, lsl #12
orr r6, #0x4000
- b 2f
-1: add r7, r3
+ b .Lnext
+.Lloop: add r7, r3
ldrh ip, [r7, #2]
ARM_BE8(rev16 ip, ip)
tst ip, #0x4000
@@ -660,25 +660,21 @@ ARM_BE8(rev16 ip, ip)
orreq ip, r0 @ mask in offset bits 7-0
ARM_BE8(rev16 ip, ip)
strh ip, [r7, #2]
- bne 2f
+ bne .Lnext
ldrh ip, [r7]
ARM_BE8(rev16 ip, ip)
bic ip, #0x20
orr ip, ip, r0, lsr #16
ARM_BE8(rev16 ip, ip)
strh ip, [r7]
-2: cmp r4, r5
- ldrcc r7, [r4], #4 @ use branch for delay slot
- bcc 1b
- bx lr
#else
#ifdef CONFIG_CPU_ENDIAN_BE8
moveq r0, #0x00004000 @ set bit 22, mov to mvn instruction
#else
moveq r0, #0x400000 @ set bit 22, mov to mvn instruction
#endif
- b 2f
-1: ldr ip, [r7, r3]
+ b .Lnext
+.Lloop: ldr ip, [r7, r3]
#ifdef CONFIG_CPU_ENDIAN_BE8
@ in BE8, we load data in BE, but instructions still in LE
bic ip, ip, #0xff000000
@@ -694,11 +690,13 @@ ARM_BE8(rev16 ip, ip)
orreq ip, ip, r0 @ mask in offset bits 7-0
#endif
str ip, [r7, r3]
-2: cmp r4, r5
+#endif
+
+.Lnext:
+ cmp r4, r5
ldrcc r7, [r4], #4 @ use branch for delay slot
- bcc 1b
+ bcc .Lloop
ret lr
-#endif
ENDPROC(__fixup_a_pv_table)
.align
--
2.17.1
next prev parent reply other threads:[~2020-09-18 10:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-18 10:30 [RFC/RFT PATCH 0/6] ARM: p2v: reduce min alignment to 2 MiB Ard Biesheuvel
2020-09-18 10:30 ` Ard Biesheuvel [this message]
2020-09-18 10:30 ` [RFC/RFT PATCH 2/6] ARM: p2v: factor out BE8 handling Ard Biesheuvel
2020-09-18 10:30 ` [RFC/RFT PATCH 3/6] ARM: p2v: drop redundant 'type' argument from __pv_stub Ard Biesheuvel
2020-09-18 10:31 ` [RFC/RFT PATCH 4/6] ARM: p2v: use relative references in patch site arrays Ard Biesheuvel
2020-09-18 10:31 ` [RFC/RFT PATCH 5/6] ARM: p2v: switch to MOVW for Thumb2 and ARM/LPAE Ard Biesheuvel
2020-09-18 10:31 ` [RFC/RFT PATCH 6/6] ARM: p2v: reduce p2v alignment requirement to 2 MiB Ard Biesheuvel
2020-09-18 17:25 ` [RFC/RFT PATCH 0/6] ARM: p2v: reduce min alignment " Ard Biesheuvel
2020-09-19 23:49 ` Nicolas Pitre
2020-09-20 7:50 ` Ard Biesheuvel
2020-09-20 8:57 ` Russell King - ARM Linux admin
2020-09-20 10:06 ` Ard Biesheuvel
2020-09-20 15:34 ` Nicolas Pitre
2020-09-20 8:55 ` Russell King - ARM Linux admin
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