From: Moritz Fischer <mdf@kernel.org>
To: gregkh@linuxfoundation.org
Cc: linux-fpga@vger.kernel.org, trix@redhat.com, hao.wu@intel.com,
yilun.xu@intel.com, russell.h.weight@intel.com,
Matthew Gerlach <matthew.gerlach@linux.intel.com>,
Moritz Fischer <mdf@kernel.org>
Subject: [PATCH 1/8] fpga: dfl: refactor cci_enumerate_feature_devs()
Date: Thu, 10 Dec 2020 08:57:57 -0800 [thread overview]
Message-ID: <20201210165804.44234-2-mdf@kernel.org> (raw)
In-Reply-To: <20201210165804.44234-1-mdf@kernel.org>
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
In preparation of looking for dfls based on a vendor specific pci
capability, move the code for the default method of finding the first
dfl at offset 0 of Bar 0 to its own function.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
---
drivers/fpga/dfl-pci.c | 84 +++++++++++++++++++++++-------------------
1 file changed, 47 insertions(+), 37 deletions(-)
diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
index a2203d03c9e2..5100695e27cd 100644
--- a/drivers/fpga/dfl-pci.c
+++ b/drivers/fpga/dfl-pci.c
@@ -119,49 +119,20 @@ static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec)
return table;
}
-/* enumerate feature devices under pci device */
-static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
+/* default method of finding dfls starting at offset 0 of bar 0 */
+static int find_dfls_by_default(struct pci_dev *pcidev,
+ struct dfl_fpga_enum_info *info)
{
- struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
- int port_num, bar, i, nvec, ret = 0;
- struct dfl_fpga_enum_info *info;
- struct dfl_fpga_cdev *cdev;
+ int port_num, bar, i, ret = 0;
resource_size_t start, len;
void __iomem *base;
- int *irq_table;
u32 offset;
u64 v;
- /* allocate enumeration info via pci_dev */
- info = dfl_fpga_enum_info_alloc(&pcidev->dev);
- if (!info)
- return -ENOMEM;
-
- /* add irq info for enumeration if the device support irq */
- nvec = cci_pci_alloc_irq(pcidev);
- if (nvec < 0) {
- dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
- ret = nvec;
- goto enum_info_free_exit;
- } else if (nvec) {
- irq_table = cci_pci_create_irq_table(pcidev, nvec);
- if (!irq_table) {
- ret = -ENOMEM;
- goto irq_free_exit;
- }
-
- ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
- kfree(irq_table);
- if (ret)
- goto irq_free_exit;
- }
-
- /* start to find Device Feature List in Bar 0 */
+ /* start to find Device Feature List from Bar 0 */
base = cci_pci_ioremap_bar0(pcidev);
- if (!base) {
- ret = -ENOMEM;
- goto irq_free_exit;
- }
+ if (!base)
+ return -ENOMEM;
/*
* PF device has FME and Ports/AFUs, and VF device only has one
@@ -208,12 +179,51 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
dfl_fpga_enum_info_add_dfl(info, start, len);
} else {
ret = -ENODEV;
- goto irq_free_exit;
}
/* release I/O mappings for next step enumeration */
pcim_iounmap_regions(pcidev, BIT(0));
+ return ret;
+}
+
+/* enumerate feature devices under pci device */
+static int cci_enumerate_feature_devs(struct pci_dev *pcidev)
+{
+ struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
+ struct dfl_fpga_enum_info *info;
+ struct dfl_fpga_cdev *cdev;
+ int nvec, ret = 0;
+ int *irq_table;
+
+ /* allocate enumeration info via pci_dev */
+ info = dfl_fpga_enum_info_alloc(&pcidev->dev);
+ if (!info)
+ return -ENOMEM;
+
+ /* add irq info for enumeration if the device support irq */
+ nvec = cci_pci_alloc_irq(pcidev);
+ if (nvec < 0) {
+ dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);
+ ret = nvec;
+ goto enum_info_free_exit;
+ } else if (nvec) {
+ irq_table = cci_pci_create_irq_table(pcidev, nvec);
+ if (!irq_table) {
+ ret = -ENOMEM;
+ goto irq_free_exit;
+ }
+
+ ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);
+ kfree(irq_table);
+ if (ret)
+ goto irq_free_exit;
+ }
+
+ ret = find_dfls_by_default(pcidev, info);
+ if (ret)
+ goto irq_free_exit;
+
/* start enumeration with prepared enumeration information */
cdev = dfl_fpga_feature_devs_enumerate(info);
if (IS_ERR(cdev)) {
--
2.29.2
next prev parent reply other threads:[~2020-12-10 16:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 16:57 [PATCH 0/8] FPGA DFL Changes for 5.11 Moritz Fischer
2020-12-10 16:57 ` Moritz Fischer [this message]
2020-12-10 16:57 ` [PATCH 2/8] fpga: dfl-pci: locate DFLs by PCIe vendor specific capability Moritz Fischer
2020-12-10 16:57 ` [PATCH 3/8] fpga: dfl: fix the definitions of type & feature_id for dfl devices Moritz Fischer
2020-12-10 16:58 ` [PATCH 4/8] fpga: dfl: move dfl_device_id to mod_devicetable.h Moritz Fischer
2020-12-10 16:58 ` [PATCH 5/8] fpga: dfl: add dfl bus support to MODULE_DEVICE_TABLE() Moritz Fischer
2020-12-14 13:43 ` Tom Rix
2020-12-15 1:39 ` Xu Yilun
2020-12-10 16:58 ` [PATCH 6/8] fpga: dfl: move dfl bus related APIs to include/linux/dfl.h Moritz Fischer
2020-12-10 16:58 ` [PATCH 7/8] fpga: dfl: add support for N3000 Nios private feature Moritz Fischer
2020-12-10 16:58 ` [PATCH 8/8] memory: dfl-emif: add the DFL EMIF private feature driver Moritz Fischer
2020-12-14 14:05 ` [PATCH 0/8] FPGA DFL Changes for 5.11 Greg KH
2021-01-07 4:37 [PATCH 0/8] FPGA DFL Changes for 5.12 Moritz Fischer
2021-01-07 4:37 ` [PATCH 1/8] fpga: dfl: refactor cci_enumerate_feature_devs() Moritz Fischer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201210165804.44234-2-mdf@kernel.org \
--to=mdf@kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=hao.wu@intel.com \
--cc=linux-fpga@vger.kernel.org \
--cc=matthew.gerlach@linux.intel.com \
--cc=russell.h.weight@intel.com \
--cc=trix@redhat.com \
--cc=yilun.xu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).