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From: Tom Rix <trix@redhat.com>
To: Nava kishore Manne <navam@xilinx.com>, Moritz Fischer <mdf@kernel.org>
Cc: "robh+dt@kernel.org" <robh+dt@kernel.org>,
	Michal Simek <michals@xilinx.com>,
	"linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>, git <git@xilinx.com>
Subject: Re: [PATCH 3/3] fpga: region: Adds runtime PM support
Date: Wed, 2 Jun 2021 13:39:10 -0700	[thread overview]
Message-ID: <8c7b7fcc-211c-3c22-a105-8c77156fde81@redhat.com> (raw)
In-Reply-To: <PH0PR02MB733699A67717E605045728DAC23D9@PH0PR02MB7336.namprd02.prod.outlook.com>


On 6/2/21 3:48 AM, Nava kishore Manne wrote:
> Ping!
>
>> -----Original Message-----
>> From: Nava kishore Manne
>> Sent: Monday, April 19, 2021 10:49 AM
>> To: Moritz Fischer <mdf@kernel.org>
>> Cc: trix@redhat.com; robh+dt@kernel.org; Michal Simek
>> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org; git <git@xilinx.com>
>> Subject: RE: [PATCH 3/3] fpga: region: Adds runtime PM support
>>
>> Hi Moritz,
>>
>> 	Please find my response inline.
>>
>>> -----Original Message-----
>>> From: Moritz Fischer <mdf@kernel.org>
>>> Sent: Saturday, April 10, 2021 3:01 AM
>>> To: Nava kishore Manne <navam@xilinx.com>
>>> Cc: mdf@kernel.org; trix@redhat.com; robh+dt@kernel.org; Michal Simek
>>> <michals@xilinx.com>; linux-fpga@vger.kernel.org;
>>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>>> kernel@lists.infradead.org; git <git@xilinx.com>
>>> Subject: Re: [PATCH 3/3] fpga: region: Adds runtime PM support
>>>
>>> On Fri, Apr 02, 2021 at 02:50:49PM +0530, Nava kishore Manne wrote:
>>>> Adds support to handle FPGA/PL power domain. With this patch, the PL
>>>> power domain will be turned on before loading the bitstream and
>>>> turned off while removing/unloading the bitstream using overlays.
>>>> This can be achieved by adding the runtime PM support.
>>>>
>>>> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
>>>> ---
>>>>   drivers/fpga/of-fpga-region.c | 18 +++++++++++++++++-
>>>>   1 file changed, 17 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/fpga/of-fpga-region.c
>>>> b/drivers/fpga/of-fpga-region.c index e405309baadc..35fc2f3d4bd8
>>>> 100644
>>>> --- a/drivers/fpga/of-fpga-region.c
>>>> +++ b/drivers/fpga/of-fpga-region.c
>>>> @@ -15,6 +15,7 @@
>>>>   #include <linux/of_platform.h>
>>>>   #include <linux/slab.h>
>>>>   #include <linux/spinlock.h>
>>>> +#include <linux/pm_runtime.h>
>>>>
>>>>   static const struct of_device_id fpga_region_of_match[] = {
>>>>   	{ .compatible = "fpga-region", },
>>>> @@ -302,6 +303,7 @@ static int
>>>> of_fpga_region_notify_pre_apply(struct
>>> fpga_region *region,
>>>>   	}
>>>>
>>>>   	region->info = info;
>>>> +	pm_runtime_get_sync(dev->parent);
>>>>   	ret = fpga_region_program_fpga(region);
>>>>   	if (ret) {
>>>>   		/* error; reject overlay */
>>>> @@ -324,10 +326,13 @@ static int
>>>> of_fpga_region_notify_pre_apply(struct fpga_region *region,  static
>>>> void
>>> of_fpga_region_notify_post_remove(struct fpga_region *region,
>>>>   					      struct of_overlay_notify_data
>>> *nd)  {
>>>> +	struct device *dev = &region->dev;
>>>> +
>>>>   	fpga_bridges_disable(&region->bridge_list);
>>>>   	fpga_bridges_put(&region->bridge_list);
>>>>   	fpga_image_info_free(region->info);
>>>>   	region->info = NULL;
>>>> +	pm_runtime_put(dev->parent);
>>>>   }
>>>>
>>>>   /**
>>>> @@ -411,9 +416,16 @@ static int of_fpga_region_probe(struct
>>> platform_device *pdev)
>>>>   		goto eprobe_mgr_put;
>>>>   	}
>>>>
>>>> +	pm_runtime_enable(&pdev->dev);
>>>> +	ret = pm_runtime_get_sync(&pdev->dev);
>>>> +	if (ret < 0)
>>>> +		goto err_pm;
>>>> +
>>>> +	pm_runtime_put(&pdev->dev);
>>>> +
>>>>   	ret = fpga_region_register(region);
>>>>   	if (ret)
>>>> -		goto eprobe_mgr_put;
>>>> +		goto err_pm;
>>>>
>>>>   	of_platform_populate(np, fpga_region_of_match, NULL, &region-
>>>> dev);
>>>>   	platform_set_drvdata(pdev, region);  @@ -422,6 +434,9 @@ static
>>>> int of_fpga_region_probe(struct  platform_device *pdev)
>>>>
>>>>   	return 0;
>>>>
>>>> +err_pm:
>>>> +	pm_runtime_put(&pdev->dev);
>>>> +	pm_runtime_disable(&pdev->dev);
>>>>   eprobe_mgr_put:
>>>>   	fpga_mgr_put(mgr);
>>>>   	return ret;
>>>> @@ -434,6 +449,7 @@ static int of_fpga_region_remove(struct
>>>> platform_device *pdev)
>>>>
>>>>   	fpga_region_unregister(region);
>>>>   	fpga_mgr_put(mgr);
>>>> +	pm_runtime_disable(region->dev.parent);
>>>>
>>>>   	return 0;
>>>>   }
>>>> --
>>>> 2.18.0
>>>>
>>> Does this add a dependency on CONFIG_PM?
>>>
>> Yes, the newly added functionality has a dependency on CONFIG_PM if it's
>> disabled the expected power domain (in our cases it's PL) will not powered
>> ON/OFF dynamically at runtime and this is as an expected behavior. Other
>> than this it will not impact the any of the driver existing functionality.

This looks like a general change for a specific board.

Why can't this be done at the board level ?

Tom

>>
>> Regards,
>> Navakishore.


  reply	other threads:[~2021-06-02 20:39 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-02  9:20 [PATCH 0/3]Enable PM generic domain support Nava kishore Manne
2021-04-02  9:20 ` [PATCH 1/3] dt-bindings: zynqmp: Add new PD_PL macro Nava kishore Manne
2021-04-09 14:47   ` Rob Herring
2021-04-02  9:20 ` [PATCH 2/3] fpga: region: Add fpga-region property 'power-domains' Nava kishore Manne
2021-04-02 17:15   ` Moritz Fischer
2021-04-05  8:46     ` Nava kishore Manne
2021-04-09 14:50   ` Rob Herring
2021-04-02  9:20 ` [PATCH 3/3] fpga: region: Adds runtime PM support Nava kishore Manne
2021-04-09 21:30   ` Moritz Fischer
2021-04-19  5:18     ` Nava kishore Manne
2021-06-02 10:48       ` Nava kishore Manne
2021-06-02 20:39         ` Tom Rix [this message]
2021-06-02 13:02   ` Johan Hovold

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