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From: Moritz Fischer <mdf@kernel.org>
To: Moritz Fischer <mdf@kernel.org>
Cc: Nava kishore Manne <nava.manne@xilinx.com>,
	trix@redhat.com, robh+dt@kernel.org, michal.simek@xilinx.com,
	linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, git@xilinx.com,
	chinnikishore369@gmail.com
Subject: Re: [PATCH 1/2] fpga: mgr: Adds secure BitStream loading support
Date: Wed, 3 Mar 2021 15:12:06 -0800	[thread overview]
Message-ID: <YEAXxuU2J1yaAl3U@archbook> (raw)
In-Reply-To: <YApf1jlEghbnDFo/@archbook>

Hi Nava,

On Thu, Jan 21, 2021 at 09:17:10PM -0800, Moritz Fischer wrote:
> On Mon, Jan 18, 2021 at 08:20:57AM +0530, Nava kishore Manne wrote:
> > This commit adds secure flags to the framework to support
> > secure BitStream Loading.
> > 
> > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > ---
> >  drivers/fpga/of-fpga-region.c | 10 ++++++++++
> >  include/linux/fpga/fpga-mgr.h | 12 ++++++++++++
> >  2 files changed, 22 insertions(+)
> > 
> > diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c
> > index e405309baadc..3a5eb4808888 100644
> > --- a/drivers/fpga/of-fpga-region.c
> > +++ b/drivers/fpga/of-fpga-region.c
> > @@ -228,6 +228,16 @@ static struct fpga_image_info *of_fpga_region_parse_ov(
> >  	if (of_property_read_bool(overlay, "encrypted-fpga-config"))
> >  		info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
> >  
> > +	if (of_property_read_bool(overlay, "userkey-encrypted-fpga-config"))
> > +		info->flags |= FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM;
> 
> Can this just be encrypted-fpga-config/FPGA_MGR_ENCRYPTED?
> > +
> > +	if (of_property_read_bool(overlay, "ddrmem-authenticated-fpga-config"))
> > +		info->flags |= FPGA_MGR_DDR_MEM_AUTH_BITSTREAM;
> > +
> > +	if (of_property_read_bool(overlay,
> > +				  "securemem-authenticated-fpga-config"))
> > +		info->flags |= FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM;
Shouldn't all these get binding docs? I remember Richard adding
authentication support for an Intel platform, too and I'd like to avoid
adding random bindings per vendor.

Would it be possible to have an 'authentication method / type' that is more
extensible with different methods maybe?

> > +
> >  	if (!of_property_read_string(overlay, "firmware-name",
> >  				     &firmware_name)) {
> >  		info->firmware_name = devm_kstrdup(dev, firmware_name,
> > diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
> > index 2bc3030a69e5..2f7455a60666 100644
> > --- a/include/linux/fpga/fpga-mgr.h
> > +++ b/include/linux/fpga/fpga-mgr.h
> > @@ -67,12 +67,24 @@ enum fpga_mgr_states {
> >   * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first
> >   *
> >   * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed
> > + *
> > + * %FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM: indicates bitstream is encrypted with
> > + *                                        user key
> > + *
> > + * %FPGA_MGR_DDR_MEM_AUTH_BITSTREAM: do bitstream authentication using DDR
> > + *                                   memory if supported
> > + *
> > + * %FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM: do bitstream authentication using secure
> > + *                                      memory if supported
> >   */
> >  #define FPGA_MGR_PARTIAL_RECONFIG	BIT(0)
> >  #define FPGA_MGR_EXTERNAL_CONFIG	BIT(1)
> >  #define FPGA_MGR_ENCRYPTED_BITSTREAM	BIT(2)
> >  #define FPGA_MGR_BITSTREAM_LSB_FIRST	BIT(3)
> >  #define FPGA_MGR_COMPRESSED_BITSTREAM	BIT(4)
> > +#define FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM	BIT(5)
> > +#define FPGA_MGR_DDR_MEM_AUTH_BITSTREAM		BIT(6)
> > +#define FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM	BIT(7)
> >  
> >  /**
> >   * struct fpga_image_info - information specific to a FPGA image
> > -- 
> > 2.18.0
> > 
> 
> Thanks,
> Moritz
Moritz

  parent reply	other threads:[~2021-03-04  0:51 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-18  2:50 [PATCH 1/2] fpga: mgr: Adds secure BitStream loading support Nava kishore Manne
2021-01-18  2:50 ` [PATCH 2/2] fpga: zynqmp: Adds secure BitStream loading support for Xilinx Nava kishore Manne
2021-01-22  5:17 ` [PATCH 1/2] fpga: mgr: Adds secure BitStream loading support Moritz Fischer
2021-01-27  9:13   ` Nava kishore Manne
2021-03-03 10:11     ` Nava kishore Manne
2021-05-10 17:44       ` Moritz Fischer
2021-05-11 13:31         ` Nava kishore Manne
2021-05-27 10:43           ` Nava kishore Manne
2021-06-08 11:50             ` Nava kishore Manne
2021-03-03 23:12   ` Moritz Fischer [this message]
2021-04-15  5:57     ` Nava kishore Manne
2021-05-04  9:43       ` Nava kishore Manne

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