From: Hanks Chen <hanks.chen@mediatek.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>
Cc: YueHaibing <yuehaibing@huawei.com>,
mtk01761 <wendell.lin@mediatek.com>,
CC Hwang <cc.hwang@mediatek.com>, <linux-gpio@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <wsd_upstream@mediatek.com>,
Hanks Chen <hanks.chen@mediatek.com>
Subject: [PATCH 2/2] clk: mediatek: remove UART3 clock support
Date: Tue, 21 Jul 2020 13:40:33 +0800 [thread overview]
Message-ID: <20200721054033.18520-3-hanks.chen@mediatek.com> (raw)
In-Reply-To: <20200721054033.18520-1-hanks.chen@mediatek.com>
CLK_INFRA_UART3 is a dummy clk interface,
it has no effect on the operation of the read/write instruction.
Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support")
Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>
---
drivers/clk/mediatek/clk-mt6779.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c
index 9766cccf5844..75f2235486be 100644
--- a/drivers/clk/mediatek/clk-mt6779.c
+++ b/drivers/clk/mediatek/clk-mt6779.c
@@ -923,8 +923,6 @@ static const struct mtk_gate infra_clks[] = {
"uart_sel", 23),
GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2",
"uart_sel", 24),
- GATE_INFRA0(CLK_INFRA_UART3, "infra_uart3",
- "uart_sel", 25),
GATE_INFRA0(CLK_INFRA_GCE_26M, "infra_gce_26m",
"axi_sel", 27),
GATE_INFRA0(CLK_INFRA_CQ_DMA_FPC, "infra_cqdma_fpc",
--
2.18.0
prev parent reply other threads:[~2020-07-21 5:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-21 5:40 [PATCH 0/2] Remove MT6779 UART3 clock support Hanks Chen
2020-07-21 5:40 ` [PATCH 1/2] dt-bindings: clock: remove " Hanks Chen
2020-07-21 22:10 ` Matthias Brugger
2020-07-22 3:09 ` Hanks Chen
2020-07-21 5:40 ` Hanks Chen [this message]
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