From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Cong Dang <cong.dang.xn@renesas.com>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 2/2] pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function
Date: Tue, 16 Apr 2024 17:47:23 +0200 [thread overview]
Message-ID: <258d03b27b77f60cc03fc3257bb4c6715b612a61.1713282028.git.geert+renesas@glider.be> (raw)
In-Reply-To: <cover.1713282028.git.geert+renesas@glider.be>
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/renesas/pfc-r8a779h0.c | 112 +++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779h0.c b/drivers/pinctrl/renesas/pfc-r8a779h0.c
index 0cbfe7637fc97743..438d1f2739dd4bcd 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779h0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779h0.c
@@ -1660,6 +1660,90 @@ static const unsigned int i2c3_mux[] = {
SDA3_MARK, SCL3_MARK,
};
+/* - INTC-EX ---------------------------------------------------------------- */
+static const unsigned int intc_ex_irq0_a_pins[] = {
+ /* IRQ0_A */
+ RCAR_GP_PIN(0, 6),
+};
+static const unsigned int intc_ex_irq0_a_mux[] = {
+ IRQ0_A_MARK,
+};
+static const unsigned int intc_ex_irq0_b_pins[] = {
+ /* IRQ0_B */
+ RCAR_GP_PIN(1, 20),
+};
+static const unsigned int intc_ex_irq0_b_mux[] = {
+ IRQ0_B_MARK,
+};
+
+static const unsigned int intc_ex_irq1_a_pins[] = {
+ /* IRQ1_A */
+ RCAR_GP_PIN(0, 5),
+};
+static const unsigned int intc_ex_irq1_a_mux[] = {
+ IRQ1_A_MARK,
+};
+static const unsigned int intc_ex_irq1_b_pins[] = {
+ /* IRQ1_B */
+ RCAR_GP_PIN(1, 21),
+};
+static const unsigned int intc_ex_irq1_b_mux[] = {
+ IRQ1_B_MARK,
+};
+
+static const unsigned int intc_ex_irq2_a_pins[] = {
+ /* IRQ2_A */
+ RCAR_GP_PIN(0, 4),
+};
+static const unsigned int intc_ex_irq2_a_mux[] = {
+ IRQ2_A_MARK,
+};
+static const unsigned int intc_ex_irq2_b_pins[] = {
+ /* IRQ2_B */
+ RCAR_GP_PIN(0, 13),
+};
+static const unsigned int intc_ex_irq2_b_mux[] = {
+ IRQ2_B_MARK,
+};
+
+static const unsigned int intc_ex_irq3_a_pins[] = {
+ /* IRQ3_A */
+ RCAR_GP_PIN(0, 3),
+};
+static const unsigned int intc_ex_irq3_a_mux[] = {
+ IRQ3_A_MARK,
+};
+static const unsigned int intc_ex_irq3_b_pins[] = {
+ /* IRQ3_B */
+ RCAR_GP_PIN(1, 23),
+};
+static const unsigned int intc_ex_irq3_b_mux[] = {
+ IRQ3_B_MARK,
+};
+
+static const unsigned int intc_ex_irq4_a_pins[] = {
+ /* IRQ4_A */
+ RCAR_GP_PIN(1, 17),
+};
+static const unsigned int intc_ex_irq4_a_mux[] = {
+ IRQ4_A_MARK,
+};
+static const unsigned int intc_ex_irq4_b_pins[] = {
+ /* IRQ4_B */
+ RCAR_GP_PIN(2, 3),
+};
+static const unsigned int intc_ex_irq4_b_mux[] = {
+ IRQ4_B_MARK,
+};
+
+static const unsigned int intc_ex_irq5_pins[] = {
+ /* IRQ5 */
+ RCAR_GP_PIN(2, 2),
+};
+static const unsigned int intc_ex_irq5_mux[] = {
+ IRQ5_MARK,
+};
+
/* - MMC -------------------------------------------------------------------- */
static const unsigned int mmc_data_pins[] = {
/* MMC_SD_D[0:3], MMC_D[4:7] */
@@ -2416,6 +2500,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(i2c2),
SH_PFC_PIN_GROUP(i2c3),
+ SH_PFC_PIN_GROUP(intc_ex_irq0_a),
+ SH_PFC_PIN_GROUP(intc_ex_irq0_b),
+ SH_PFC_PIN_GROUP(intc_ex_irq1_a),
+ SH_PFC_PIN_GROUP(intc_ex_irq1_b),
+ SH_PFC_PIN_GROUP(intc_ex_irq2_a),
+ SH_PFC_PIN_GROUP(intc_ex_irq2_b),
+ SH_PFC_PIN_GROUP(intc_ex_irq3_a),
+ SH_PFC_PIN_GROUP(intc_ex_irq3_b),
+ SH_PFC_PIN_GROUP(intc_ex_irq4_a),
+ SH_PFC_PIN_GROUP(intc_ex_irq4_b),
+ SH_PFC_PIN_GROUP(intc_ex_irq5),
+
BUS_DATA_PIN_GROUP(mmc_data, 1),
BUS_DATA_PIN_GROUP(mmc_data, 4),
BUS_DATA_PIN_GROUP(mmc_data, 8),
@@ -2629,6 +2725,20 @@ static const char * const i2c3_groups[] = {
"i2c3",
};
+static const char * const intc_ex_groups[] = {
+ "intc_ex_irq0_a",
+ "intc_ex_irq0_b",
+ "intc_ex_irq1_a",
+ "intc_ex_irq1_b",
+ "intc_ex_irq2_a",
+ "intc_ex_irq2_b",
+ "intc_ex_irq3_a",
+ "intc_ex_irq3_b",
+ "intc_ex_irq4_a",
+ "intc_ex_irq4_b",
+ "intc_ex_irq5",
+};
+
static const char * const mmc_groups[] = {
"mmc_data1",
"mmc_data4",
@@ -2813,6 +2923,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(i2c2),
SH_PFC_FUNCTION(i2c3),
+ SH_PFC_FUNCTION(intc_ex),
+
SH_PFC_FUNCTION(mmc),
SH_PFC_FUNCTION(msiof0),
--
2.34.1
prev parent reply other threads:[~2024-04-16 15:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-16 15:47 [PATCH 0/2] pinctrl: renesas: r8a779h0: Add INTC-EX support Geert Uytterhoeven
2024-04-16 15:47 ` [PATCH 1/2] pinctrl: renesas: r8a779h0: Fix IRQ suffixes Geert Uytterhoeven
2024-04-16 15:47 ` Geert Uytterhoeven [this message]
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