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From: "tip-bot for Woods, Brian" <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: mingo@kernel.org, x86@kernel.org, tglx@linutronix.de,
	linux-pci@vger.kernel.org, mingo@redhat.com, puwen@hygon.cn,
	bp@suse.de, linux-hwmon@vger.kernel.org, jdelvare@suse.com,
	brian.woods@amd.com, hpa@zytor.com, linux-kernel@vger.kernel.org,
	clemens@ladisch.de, linux@roeck-us.net, bhelgaas@google.com,
	qianyue.zj@alibaba-inc.com, Brian.Woods@amd.com
Subject: [tip:x86/amd-nb] x86/amd_nb: Add PCI device IDs for family 17h, model 30h
Date: Wed, 7 Nov 2018 12:44:03 -0800	[thread overview]
Message-ID: <tip-be3518a16ef270e3b030a6ae96055f83f51bd3dd@git.kernel.org> (raw)
In-Reply-To: <20181106200754.60722-4-brian.woods@amd.com>

Commit-ID:  be3518a16ef270e3b030a6ae96055f83f51bd3dd
Gitweb:     https://git.kernel.org/tip/be3518a16ef270e3b030a6ae96055f83f51bd3dd
Author:     Woods, Brian <Brian.Woods@amd.com>
AuthorDate: Tue, 6 Nov 2018 20:08:18 +0000
Committer:  Borislav Petkov <bp@suse.de>
CommitDate: Wed, 7 Nov 2018 21:36:09 +0100

x86/amd_nb: Add PCI device IDs for family 17h, model 30h

Add the PCI device IDs for family 17h model 30h, since they are needed
for accessing various registers via the data fabric/SMN interface.

Signed-off-by: Brian Woods <brian.woods@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Clemens Ladisch <clemens@ladisch.de>
CC: Guenter Roeck <linux@roeck-us.net>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: Ingo Molnar <mingo@redhat.com>
CC: Jean Delvare <jdelvare@suse.com>
CC: Jia Zhang <qianyue.zj@alibaba-inc.com>
CC: <linux-hwmon@vger.kernel.org>
CC: <linux-pci@vger.kernel.org>
CC: Pu Wen <puwen@hygon.cn>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/20181106200754.60722-4-brian.woods@amd.com
---
 arch/x86/kernel/amd_nb.c | 6 ++++++
 include/linux/pci_ids.h  | 1 +
 2 files changed, 7 insertions(+)

diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index cc34266e3c62..cc51275c8759 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -16,8 +16,10 @@
 
 #define PCI_DEVICE_ID_AMD_17H_ROOT	0x1450
 #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT	0x15d0
+#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT	0x1480
 #define PCI_DEVICE_ID_AMD_17H_DF_F4	0x1464
 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
 
 /* Protect the PCI config register pairs used for SMN and DF indirect access. */
 static DEFINE_MUTEX(smn_mutex);
@@ -27,9 +29,11 @@ static u32 *flush_words;
 static const struct pci_device_id amd_root_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
 	{}
 };
 
+
 #define PCI_DEVICE_ID_AMD_CNB17H_F4     0x1704
 
 const struct pci_device_id amd_nb_misc_ids[] = {
@@ -43,6 +47,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
 	{}
 };
@@ -56,6 +61,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
 	{}
 };
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 78d5cd29778a..349276fbd269 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -547,6 +547,7 @@
 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584
 #define PCI_DEVICE_ID_AMD_17H_DF_F3	0x1463
 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
+#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
 #define PCI_DEVICE_ID_AMD_CNB17H_F3	0x1703
 #define PCI_DEVICE_ID_AMD_LANCE		0x2000
 #define PCI_DEVICE_ID_AMD_LANCE_HOME	0x2001

  reply	other threads:[~2018-11-07 20:44 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-06 20:08 [PATCH v2 0/4] Update DF/SMN access and k10temp for AMD F17h M30h Woods, Brian
2018-11-06 20:08 ` [PATCH v2 1/4] k10temp: x86/amd_nb: consolidate shared device IDs Woods, Brian
2018-11-06 22:45   ` Guenter Roeck
2018-11-07 20:42   ` [tip:x86/amd-nb] hwmon/k10temp, x86/amd_nb: Consolidate " tip-bot for Woods, Brian
2018-11-06 20:08 ` [PATCH v2 2/4] x86/amd_nb: add support for newer PCI topologies Woods, Brian
2018-11-07 20:43   ` [tip:x86/amd-nb] x86/amd_nb: Add " tip-bot for Woods, Brian
2018-11-06 20:08 ` [PATCH v2 3/4] x86/amd_nb: add PCI device IDs for F17h M30h Woods, Brian
2018-11-07 20:44   ` tip-bot for Woods, Brian [this message]
2018-11-06 20:08 ` [PATCH v2 4/4] hwmon: k10temp: add support for AMD F17h M30h CPUs Woods, Brian
2018-11-06 22:45   ` Guenter Roeck
2018-11-07 20:44   ` [tip:x86/amd-nb] hwmon/k10temp: Add support for AMD family 17h, model 30h CPUs tip-bot for Woods, Brian

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