From: David Woodhouse <dwmw2@infradead.org>
To: Thomas Gleixner <tglx@linutronix.de>, x86@kernel.org
Cc: iommu <iommu@lists.linux-foundation.org>,
kvm <kvm@vger.kernel.org>,
linux-hyperv@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR
Date: Wed, 07 Oct 2020 17:15:48 +0100 [thread overview]
Message-ID: <244EB899-6273-416C-8376-68FBCE0DA47A@infradead.org> (raw)
In-Reply-To: <877ds23txo.fsf@nanos.tec.linutronix.de>
On 7 October 2020 17:02:59 BST, Thomas Gleixner <tglx@linutronix.de> wrote:
>On Wed, Oct 07 2020 at 15:23, David Woodhouse wrote:
>> On Wed, 2020-10-07 at 16:05 +0200, Thomas Gleixner wrote:
>>> On Wed, Oct 07 2020 at 14:08, David Woodhouse wrote:
>>> > On 7 October 2020 13:59:00 BST, Thomas Gleixner
><tglx@linutronix.de> wrote:
>>> > > On Wed, Oct 07 2020 at 08:48, David Woodhouse wrote:
>>> > > > To fix *that* case, we really do need the whole series giving
>us per-
>>> > > > domain restricted affinity, and to use it for those
>MSIs/IOAPICs that
>>> > > > the IRQ remapping doesn't cover.
>>> > >
>>> > > Which do not exist today.
>>> >
>>> > Sure. But at patch 10/13 into this particular patch series, it
>*does*
>>> > exist.
>>>
>>> As I told you before: Your ordering is wrong. We do not introduce
>bugs
>>> first and then fix them later ....
>>
>> I didn't introduce that bug; it's been there for years. Fixing it
>> properly requires per-irqdomain affinity limits.
>>
>> There's a cute little TODO at least in the Intel irq-remapping
>driver,
>> noting that we should probably check if there are any IOAPICs that
>> aren't in the scope of any DRHD at all. But that's all.
>
>So someone forgot to remove the cute little TODO when this was added:
>
> if (parse_ioapics_under_ir()) {
> pr_info("Not enabling interrupt remapping\n");
> goto error;
> }
And HPET, and PCI devices including those that might be hotplugged in future and not be covered by any extant IOMMU's scope?
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
next prev parent reply other threads:[~2020-10-07 16:15 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 15:28 [PATCH 0/13] Fix per-domain IRQ affinity, allow >255 CPUs on x86 without IRQ remapping David Woodhouse
2020-10-05 15:28 ` [PATCH 01/13] x86/apic: Use x2apic in guest kernels even with unusable CPUs David Woodhouse
2020-10-05 15:28 ` [PATCH 02/13] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-06 20:45 ` Thomas Gleixner
2020-10-05 15:28 ` [PATCH 03/13] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-05 15:28 ` [PATCH 04/13] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse
2020-10-05 15:28 ` [PATCH 05/13] genirq: Prepare for default affinity to be passed to __irq_alloc_descs() David Woodhouse
2020-10-06 21:01 ` Thomas Gleixner
2020-10-06 21:07 ` David Woodhouse
2020-10-05 15:28 ` [PATCH 06/13] genirq: Add default_affinity argument " David Woodhouse
2020-10-06 21:06 ` Thomas Gleixner
2020-10-05 15:28 ` [PATCH 07/13] irqdomain: Add max_affinity argument to irq_domain_alloc_descs() David Woodhouse
2020-10-06 21:26 ` Thomas Gleixner
2020-10-07 7:19 ` David Woodhouse
2020-10-07 13:37 ` Thomas Gleixner
2020-10-07 14:10 ` David Woodhouse
2020-10-07 15:57 ` Thomas Gleixner
2020-10-07 16:11 ` David Woodhouse
2020-10-07 20:53 ` Thomas Gleixner
2020-10-08 7:21 ` David Woodhouse
2020-10-08 9:34 ` Thomas Gleixner
2020-10-08 11:10 ` David Woodhouse
2020-10-08 12:40 ` Thomas Gleixner
2020-10-09 7:54 ` David Woodhouse
2020-10-05 15:28 ` [PATCH 08/13] genirq: Add irq_domain_set_affinity() David Woodhouse
2020-10-06 21:32 ` Thomas Gleixner
2020-10-07 7:22 ` David Woodhouse
2020-10-05 15:28 ` [PATCH 09/13] x86/irq: Add x86_non_ir_cpumask David Woodhouse
2020-10-06 21:42 ` Thomas Gleixner
2020-10-07 7:25 ` David Woodhouse
2020-10-05 15:28 ` [PATCH 10/13] x86/irq: Limit IOAPIC and MSI domains' affinity without IR David Woodhouse
2020-10-06 21:54 ` Thomas Gleixner
2020-10-07 7:48 ` David Woodhouse
2020-10-07 12:59 ` Thomas Gleixner
2020-10-07 13:08 ` David Woodhouse
2020-10-07 14:05 ` Thomas Gleixner
2020-10-07 14:23 ` David Woodhouse
2020-10-07 16:02 ` Thomas Gleixner
2020-10-07 16:15 ` David Woodhouse [this message]
2020-10-07 15:05 ` David Woodhouse
2020-10-07 15:25 ` Thomas Gleixner
2020-10-07 15:46 ` David Woodhouse
2020-10-07 17:23 ` Thomas Gleixner
2020-10-07 17:34 ` David Woodhouse
2020-10-05 15:28 ` [PATCH 11/13] x86/smp: Allow more than 255 CPUs even without interrupt remapping David Woodhouse
2020-10-05 15:28 ` [PATCH 12/13] iommu/irq_remapping: Kill most of hyperv-iommu.c now it's redundant David Woodhouse
2020-10-05 15:28 ` [PATCH 13/13] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-07 8:14 ` Paolo Bonzini
2020-10-07 8:59 ` David Woodhouse
2020-10-07 11:15 ` Paolo Bonzini
2020-10-07 12:04 ` David Woodhouse
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