From: Tianyu Lan <ltykernel@gmail.com>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: kys@microsoft.com, haiyangz@microsoft.com,
sthemmin@microsoft.com, wei.liu@kernel.org, decui@microsoft.com,
catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com,
dave.hansen@linux.intel.com, luto@kernel.org,
peterz@infradead.org, konrad.wilk@oracle.com,
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sstabellini@kernel.org, joro@8bytes.org, davem@davemloft.net,
kuba@kernel.org, jejb@linux.ibm.com, martin.petersen@oracle.com,
arnd@arndb.de, hch@lst.de, m.szyprowski@samsung.com,
robin.murphy@arm.com, brijesh.singh@amd.com,
thomas.lendacky@amd.com, Tianyu.Lan@microsoft.com,
pgonda@google.com, martin.b.radev@gmail.com,
akpm@linux-foundation.org, kirill.shutemov@linux.intel.com,
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linux-arm-kernel@lists.infradead.org,
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ardb@kernel.org, michael.h.kelley@microsoft.com,
iommu@lists.linux-foundation.org, linux-arch@vger.kernel.org,
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linux-scsi@vger.kernel.org, netdev@vger.kernel.org,
vkuznets@redhat.com, parri.andrea@gmail.com,
dave.hansen@intel.com
Subject: Re: [PATCH V4 05/13] hyperv: Add Write/Read MSR registers via ghcb page
Date: Sat, 28 Aug 2021 01:46:44 +0800 [thread overview]
Message-ID: <aed9409f-8708-2599-e441-c6a0c92b737b@gmail.com> (raw)
In-Reply-To: <YSkj2kvYoYW8kDiF@kroah.com>
On 8/28/2021 1:41 AM, Greg KH wrote:
> On Fri, Aug 27, 2021 at 01:21:03PM -0400, Tianyu Lan wrote:
>> From: Tianyu Lan <Tianyu.Lan@microsoft.com>
>>
>> Hyperv provides GHCB protocol to write Synthetic Interrupt
>> Controller MSR registers in Isolation VM with AMD SEV SNP
>> and these registers are emulated by hypervisor directly.
>> Hyperv requires to write SINTx MSR registers twice. First
>> writes MSR via GHCB page to communicate with hypervisor
>> and then writes wrmsr instruction to talk with paravisor
>> which runs in VMPL0. Guest OS ID MSR also needs to be set
>> via GHCB page.
>>
>> Signed-off-by: Tianyu Lan <Tianyu.Lan@microsoft.com>
>> ---
>> Change since v1:
>> * Introduce sev_es_ghcb_hv_call_simple() and share code
>> between SEV and Hyper-V code.
>> Change since v3:
>> * Pass old_msg_type to hv_signal_eom() as parameter.
>> * Use HV_REGISTER_* marcro instead of HV_X64_MSR_*
>> * Add hv_isolation_type_snp() weak function.
>> * Add maros to set syinc register in ARM code.
>> ---
>> arch/arm64/include/asm/mshyperv.h | 23 ++++++
>> arch/x86/hyperv/hv_init.c | 36 ++--------
>> arch/x86/hyperv/ivm.c | 112 ++++++++++++++++++++++++++++++
>> arch/x86/include/asm/mshyperv.h | 80 ++++++++++++++++++++-
>> arch/x86/include/asm/sev.h | 3 +
>> arch/x86/kernel/sev-shared.c | 63 ++++++++++-------
>> drivers/hv/hv.c | 112 ++++++++++++++++++++----------
>> drivers/hv/hv_common.c | 6 ++
>> include/asm-generic/mshyperv.h | 4 +-
>> 9 files changed, 345 insertions(+), 94 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/mshyperv.h
>> index 20070a847304..ced83297e009 100644
>> --- a/arch/arm64/include/asm/mshyperv.h
>> +++ b/arch/arm64/include/asm/mshyperv.h
>> @@ -41,6 +41,29 @@ static inline u64 hv_get_register(unsigned int reg)
>> return hv_get_vpreg(reg);
>> }
>>
>> +#define hv_get_simp(val) { val = hv_get_register(HV_REGISTER_SIMP); }
>> +#define hv_set_simp(val) hv_set_register(HV_REGISTER_SIMP, val)
>> +
>> +#define hv_get_siefp(val) { val = hv_get_register(HV_REGISTER_SIEFP); }
>> +#define hv_set_siefp(val) hv_set_register(HV_REGISTER_SIEFP, val)
>> +
>> +#define hv_get_synint_state(int_num, val) { \
>> + val = hv_get_register(HV_REGISTER_SINT0 + int_num); \
>> + }
>> +
>> +#define hv_set_synint_state(int_num, val) \
>> + hv_set_register(HV_REGISTER_SINT0 + int_num, val)
>> +
>> +#define hv_get_synic_state(val) { \
>> + val = hv_get_register(HV_REGISTER_SCONTROL); \
>> + }
>> +
>> +#define hv_set_synic_state(val) \
>> + hv_set_register(HV_REGISTER_SCONTROL, val)
>> +
>> +#define hv_signal_eom(old_msg_type) \
>> + hv_set_register(HV_REGISTER_EOM, 0)
>
> Please just use real inline functions and not #defines if you really
> need it.
>
OK. Will update. Thanks.
next prev parent reply other threads:[~2021-08-27 17:47 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-27 17:20 [PATCH V4 00/13] x86/Hyper-V: Add Hyper-V Isolation VM support Tianyu Lan
2021-08-27 17:20 ` [PATCH V4 01/13] x86/hyperv: Initialize GHCB page in Isolation VM Tianyu Lan
2021-09-02 0:15 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 02/13] x86/hyperv: Initialize shared memory boundary in the " Tianyu Lan
2021-09-02 0:15 ` Michael Kelley
2021-09-02 6:35 ` Tianyu Lan
2021-08-27 17:21 ` [PATCH V4 03/13] x86/hyperv: Add new hvcall guest address host visibility support Tianyu Lan
2021-09-02 0:16 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 04/13] hyperv: Mark vmbus ring buffer visible to host in Isolation VM Tianyu Lan
2021-08-27 17:41 ` Greg KH
2021-08-27 17:44 ` Tianyu Lan
2021-09-02 0:17 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 05/13] hyperv: Add Write/Read MSR registers via ghcb page Tianyu Lan
2021-08-27 17:41 ` Greg KH
2021-08-27 17:46 ` Tianyu Lan [this message]
2021-09-02 3:32 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 06/13] hyperv: Add ghcb hvcall support for SNP VM Tianyu Lan
2021-09-02 0:20 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 07/13] hyperv/Vmbus: Add SNP support for VMbus channel initiate message Tianyu Lan
2021-09-02 0:21 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 08/13] hyperv/vmbus: Initialize VMbus ring buffer for Isolation VM Tianyu Lan
2021-09-02 0:23 ` Michael Kelley
2021-09-02 13:35 ` Tianyu Lan
2021-09-02 16:14 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 09/13] DMA: Add dma_map_decrypted/dma_unmap_encrypted() function Tianyu Lan
2021-08-27 17:21 ` [PATCH V4 10/13] x86/Swiotlb: Add Swiotlb bounce buffer remap function for HV IVM Tianyu Lan
2021-08-27 17:21 ` [PATCH V4 11/13] hyperv/IOMMU: Enable swiotlb bounce buffer for Isolation VM Tianyu Lan
2021-09-02 1:27 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 12/13] hv_netvsc: Add Isolation VM support for netvsc driver Tianyu Lan
2021-09-02 2:34 ` Michael Kelley
2021-09-02 4:56 ` Michael Kelley
2021-08-27 17:21 ` [PATCH V4 13/13] hv_storvsc: Add Isolation VM support for storvsc driver Tianyu Lan
2021-09-02 2:08 ` Michael Kelley
2021-08-30 12:00 ` [PATCH V4 00/13] x86/Hyper-V: Add Hyper-V Isolation VM support Christoph Hellwig
2021-08-31 15:20 ` Tianyu Lan
2021-09-02 7:51 ` Christoph Hellwig
2021-08-31 17:16 ` Michael Kelley
2021-09-02 7:59 ` Christoph Hellwig
2021-09-02 11:21 ` Tianyu Lan
2021-09-02 15:57 ` Michael Kelley
2021-09-14 14:41 ` Tianyu Lan
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