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From: Ray Jui <ray.jui@broadcom.com>
To: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,
	Dhananjay Phadke <dphadke@linux.microsoft.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com>,
	Brendan Higgins <brendanhiggins@google.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
	linux-i2c <linux-i2c@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Lori Hikichi <lori.hikichi@broadcom.com>,
	Ray Jui <rjui@broadcom.com>,
	Scott Branden <sbranden@broadcom.com>,
	Wolfram Sang <wsa@kernel.org>
Subject: Re: [PATCH v1 6/6] i2c: iproc: handle rx fifo full interrupt
Date: Mon, 26 Oct 2020 17:36:04 -0700	[thread overview]
Message-ID: <94f8211d-1273-4c68-31e9-2f35f364e6c8@broadcom.com> (raw)
In-Reply-To: <CAHO=5PE_tk0nzvd6x1ZNJvKu2d6zHGvb7NoLw3JtmO7Ho-tm8A@mail.gmail.com>

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On 10/26/2020 8:13 AM, Rayagonda Kokatanur wrote:
> Hi Dhanajay,
> 
> On Fri, Oct 23, 2020 at 11:12 PM Ray Jui <ray.jui@broadcom.com> wrote:
>>
>>
>>
>> On 10/12/2020 3:03 PM, Dhananjay Phadke wrote:
>>> From: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
>>>
>>> On Sun, 11 Oct 2020 23:52:54 +0530, Rayagonda Kokatanur wrote:
>>>> Add code to handle IS_S_RX_FIFO_FULL_SHIFT interrupt to support
>>>> master write request with >= 64 bytes.
>>>>
>>>> Iproc has a slave rx fifo size of 64 bytes.
>>>> Rx fifo full interrupt (IS_S_RX_FIFO_FULL_SHIFT) will be generated
>>>> when RX fifo becomes full. This can happen if master issues write
>>>> request of more than 64 bytes.
>>>>
>>>
>>> ARM cores run much faster than I2C bus, why would rx fifo go full when
>>> rx interrupt is enabled and bytes are read out by bus driver isr?
>>> Isn't fifo read pointer updated on these byte reads?
>>
>> Hi Rayagonda,
>>
>> Could you please reply on this question? For transactions > 64 bytes, do
>> we batch until RX FIFO is full before we read out the data?
> 
> Sorry I missed this question.
> Yes with current design we are batching 64 bytes for translation > 64 bytes.
> 

So we do batch the transfer and read them in one shot, and that's how
the FIFO full interrupt is being utilized for. That sounds okay to me.

Thanks,

Ray

> Best regards,
> Rayagonda
> 
> 
>>
>> Thanks,
>>
>> Ray
>>
>>> Does controller stretch clock when rx fifo is full (e.g. kernel has
>>> crashed, bus driver isn't draining fifo)?
>>>

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      reply	other threads:[~2020-10-27  0:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-11 18:22 [PATCH v1 0/6] fix iproc driver to handle master read request Rayagonda Kokatanur
2020-10-11 18:22 ` [PATCH v1 1/6] i2c: iproc: handle Master aborted error Rayagonda Kokatanur
2020-10-23 17:14   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 2/6] i2c: iproc: handle only slave interrupts which are enabled Rayagonda Kokatanur
2020-10-23 17:18   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 3/6] i2c: iproc: update slave isr mask (ISR_MASK_SLAVE) Rayagonda Kokatanur
2020-10-23 17:19   ` Ray Jui
2020-10-11 18:22 ` [PATCH v1 4/6] i2c: iproc: fix typo in slave_isr function Rayagonda Kokatanur
2020-10-23 17:20   ` Ray Jui
2020-10-26 13:52     ` Rayagonda Kokatanur
2020-10-11 18:22 ` [PATCH v1 5/6] i2c: iproc: handle master read request Rayagonda Kokatanur
2020-10-14  3:20   ` Dhananjay Phadke
2020-10-14  9:12     ` Rayagonda Kokatanur
     [not found]     ` <CAHO=5PEtoJrFEPin0hH19Ubs9Zmhxiay4jSGAhXBFE=ft=+CYg@mail.gmail.com>
2020-10-23 17:26       ` Ray Jui
2020-10-26 13:55         ` Rayagonda Kokatanur
2020-10-11 18:22 ` [PATCH v1 6/6] i2c: iproc: handle rx fifo full interrupt Rayagonda Kokatanur
2020-10-12 22:03   ` Dhananjay Phadke
2020-10-23 17:42   ` Ray Jui
2020-10-26 15:13     ` Rayagonda Kokatanur
2020-10-27  0:36       ` Ray Jui [this message]

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