From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D61E2C433EF for ; Fri, 26 Nov 2021 15:48:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378263AbhKZPvN (ORCPT ); Fri, 26 Nov 2021 10:51:13 -0500 Received: from mga07.intel.com ([134.134.136.100]:56837 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237966AbhKZPtN (ORCPT ); Fri, 26 Nov 2021 10:49:13 -0500 X-IronPort-AV: E=McAfee;i="6200,9189,10180"; a="299083269" X-IronPort-AV: E=Sophos;i="5.87,266,1631602800"; d="scan'208";a="299083269" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Nov 2021 07:43:32 -0800 X-IronPort-AV: E=Sophos;i="5.87,266,1631602800"; d="scan'208";a="458226709" Received: from smile.fi.intel.com ([10.237.72.184]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Nov 2021 07:43:29 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1mqdNm-00ApEa-9w; Fri, 26 Nov 2021 17:43:26 +0200 Date: Fri, 26 Nov 2021 17:43:26 +0200 From: Andy Shevchenko To: Wolfram Sang , Jean Delvare , Lee Jones , Tan Jui Nee , Jim Quinlan , Jonathan Yong , Bjorn Helgaas , linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pci@vger.kernel.org Cc: Jean Delvare , Peter Tyser , hdegoede@redhat.com, henning.schild@siemens.com Subject: Re: [rfc, PATCH v1 0/7] PCI: introduce p2sb helper Message-ID: References: <20210308122020.57071-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210308122020.57071-1-andriy.shevchenko@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org On Mon, Mar 08, 2021 at 02:20:13PM +0200, Andy Shevchenko wrote: > There are a few users and even at least one more is coming > that would like to utilize p2sb mechanisms like hide/unhide > a device from PCI configuration space. > > Here is the series to deduplicate existing users and provide > a generic way for new comers. > > It also includes a patch to enable GPIO controllers on Apollo Lake > when it's used with ABL bootloader w/o ACPI support. > > Please, comment on the approach and individual patches. > > (Since it's cross subsystem, the PCI seems like a main one and > I think it makes sense to route it thru it with immutable tag > or branch provided for the others). TWIMC, after refreshing (a bit) my memories on this thread, I think the roadmap may look like the following: 1) exporting necessary APIs from PCI core to avoid code dup; 2) moving pci-p2sb.c out from PCI to PDx86 where it seems naturally fit; 3) addressing comments on patches that are not going to change their location / functionality; 4) adding tags, etc. Any objections? Meanwhile I will try to setup a machine with ACPI tables to test the code if they have not been provided. -- With Best Regards, Andy Shevchenko