From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
linux-i3c@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
<devicetree@vger.kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Rajeev Huralikoppi <rajeev.huralikoppi@silvaco.com>,
Nicolas Pitre <nico@fluxnic.net>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Conor Culhane <conor.culhane@silvaco.com>
Subject: [PATCH v5 4/6] dt-bindings: i3c: Describe Silvaco master binding
Date: Thu, 21 Jan 2021 11:18:06 +0100 [thread overview]
Message-ID: <20210121101808.14654-5-miquel.raynal@bootlin.com> (raw)
In-Reply-To: <20210121101808.14654-1-miquel.raynal@bootlin.com>
Silvaco provide a dual-role I3C master.
Description is rather simple: it needs a register mapping, three
clocks and an interrupt.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/i3c/silvaco,i3c-master.yaml | 60 +++++++++++++++++++
1 file changed, 60 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
new file mode 100644
index 000000000000..adb5165505aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Silvaco I3C master
+
+maintainers:
+ - Conor Culhane <conor.culhane@silvaco.com>
+
+allOf:
+ - $ref: "i3c.yaml#"
+
+properties:
+ compatible:
+ const: silvaco,i3c-master-v1
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: system clock
+ - description: bus clock
+ - description: other (slower) events clock
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: fast_clk
+ - const: slow_clk
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
+additionalProperties: true
+
+examples:
+ - |
+ i3c-master@a0000000 {
+ compatible = "silvaco,i3c-master";
+ clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>;
+ clock-names = "pclk", "fast_clk", "slow_clk";
+ interrupt-parent = <&gic>;
+ interrupts = <0 89 4>;
+ reg = <0xa0000000 0x1000>;
+ #address-cells = <3>;
+ #size-cells = <0>;
+ };
--
2.20.1
--
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c
next prev parent reply other threads:[~2021-01-21 10:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-21 10:18 [PATCH v5 0/6] Silvaco I3C master driver Miquel Raynal
2021-01-21 10:18 ` [PATCH v5 1/6] dt-bindings: i3c: Convert the bus description to yaml Miquel Raynal
2021-02-05 21:31 ` Rob Herring
2021-01-21 10:18 ` [PATCH v5 2/6] dt-bindings: i3c: mipi-hci: Include the bus binding Miquel Raynal
2021-02-05 21:31 ` Rob Herring
2021-01-21 10:18 ` [PATCH v5 3/6] dt-bindings: Add vendor prefix for Silvaco Miquel Raynal
2021-01-21 10:18 ` Miquel Raynal [this message]
2021-01-21 10:18 ` [PATCH v5 5/6] i3c: master: svc: Add Silvaco I3C master driver Miquel Raynal
2021-01-21 10:18 ` [PATCH v5 6/6] MAINTAINERS: Add Silvaco I3C master Miquel Raynal
2021-02-05 23:44 ` [PATCH v5 0/6] Silvaco I3C master driver Alexandre Belloni
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