From: Roger Quadros <rogerq@ti.com>
To: <hch@lst.de>, "hdegoede@redhat.com" <hdegoede@redhat.com>
Cc: <axboe@kernel.dk>, <iommu@lists.linux-foundation.org>,
<linux-ide@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<jejb@linux.ibm.com>, <martin.petersen@oracle.com>,
<rmk+kernel@arm.linux.org.uk>, "Nori, Sekhar" <nsekhar@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tony Lindgren <tony@atomide.com>
Subject: SATA broken with LPAE
Date: Wed, 26 Jun 2019 11:43:59 +0300 [thread overview]
Message-ID: <16f065ef-f4ac-46b4-de2a-6b5420ae873a@ti.com> (raw)
Hi Christoph / Hans,
SATA has been broken on TI platforms with LPAE, on systems with RAM addresses > 32-bits,
(e.g. DRA7 rev.H+) since v4.18.
The commit at which it breaks is
21e07dba9fb1179148089d611fc9e6e70d1887c3 ("scsi: reduce use of block bounce buffers").
The effect is that the SATA controller starts to see DMA addresses
above 32-bit which it does not support.
Could you please shed some light on how it is supposed to work if
we don't call blk_queue_bounce_limit() for devices that can do only 32-bit DMA
on a system that has addressable RAM above 32-bit Physical?
The below patch fixes it. Is this the right thing to do?
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 3aab2e3d57f3..b925dc54cfa5 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -62,6 +62,9 @@ static int ahci_probe(struct platform_device *pdev)
if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))
hpriv->flags |= AHCI_HFLAG_NO_FBS | AHCI_HFLAG_NO_NCQ;
+ if (of_device_is_compatible(dev->of_node, "snps,dwc-ahci"))
+ hpriv->flags |= AHCI_HFLAG_32BIT_ONLY;
+
port = acpi_device_get_match_data(dev);
if (!port)
port = &ahci_port_info;
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index 65d0a10c76ad..9083c7b89dfc 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -1750,6 +1750,21 @@ static int scsi_map_queues(struct blk_mq_tag_set *set)
return blk_mq_map_queues(&set->map[HCTX_TYPE_DEFAULT]);
}
+static u64 scsi_calculate_bounce_limit(struct Scsi_Host *shost)
+{
+ struct device *dma_dev = shost->dma_dev;
+ u64 bounce_limit = 0xffffffff;
+
+ if (shost->unchecked_isa_dma)
+ return BLK_BOUNCE_ISA;
+
+ if (dma_dev && dma_dev->dma_mask)
+ bounce_limit = (u64)dma_max_pfn(dma_dev) << PAGE_SHIFT;
+
+ return bounce_limit;
+}
+
void __scsi_init_queue(struct Scsi_Host *shost, struct request_queue *q)
{
struct device *dev = shost->dma_dev;
@@ -1769,8 +1784,7 @@ void __scsi_init_queue(struct Scsi_Host *shost, struct request_queue *q)
}
blk_queue_max_hw_sectors(q, shost->max_sectors);
- if (shost->unchecked_isa_dma)
- blk_queue_bounce_limit(q, BLK_BOUNCE_ISA);
+ blk_queue_bounce_limit(q, scsi_calculate_bounce_limit(shost));
blk_queue_segment_boundary(q, shost->dma_boundary);
dma_set_seg_boundary(dev, shost->dma_boundary);
cheers,
-roger
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next reply other threads:[~2019-06-26 8:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 8:43 Roger Quadros [this message]
2019-06-26 12:53 ` SATA broken with LPAE Christoph Hellwig
2019-06-27 9:07 ` Russell King - ARM Linux admin
2019-06-27 9:15 ` Christoph Hellwig
2019-06-27 10:09 ` Russell King - ARM Linux admin
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