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Thu, 21 May 2020 15:38:35 +0100 MIME-Version: 1.0 Date: Thu, 21 May 2020 15:38:35 +0100 From: Marc Zyngier To: Will Deacon Subject: Re: [PATCH v7 13/24] iommu/arm-smmu-v3: Enable broadcast TLB maintenance In-Reply-To: <20200521141730.GJ6608@willie-the-truck> References: <20200519175502.2504091-1-jean-philippe@linaro.org> <20200519175502.2504091-14-jean-philippe@linaro.org> <20200521141730.GJ6608@willie-the-truck> User-Agent: Roundcube Webmail/1.4.4 Message-ID: <0c896ad27b43b2de554cf772f9453d0a@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: will@kernel.org, jean-philippe@linaro.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-mm@kvack.org, joro@8bytes.org, catalin.marinas@arm.com, robin.murphy@arm.com, kevin.tian@intel.com, baolu.lu@linux.intel.com, Jonathan.Cameron@huawei.com, jacob.jun.pan@linux.intel.com, christian.koenig@amd.com, felix.kuehling@amd.com, zhangfei.gao@linaro.org, jgg@ziepe.ca, xuzaibo@huawei.com, fenghua.yu@intel.com, hch@infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: Jean-Philippe Brucker , kevin.tian@intel.com, devicetree@vger.kernel.org, jgg@ziepe.ca, linux-pci@vger.kernel.org, fenghua.yu@intel.com, hch@infradead.org, linux-mm@kvack.org, iommu@lists.linux-foundation.org, zhangfei.gao@linaro.org, catalin.marinas@arm.com, felix.kuehling@amd.com, robin.murphy@arm.com, christian.koenig@amd.com, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On 2020-05-21 15:17, Will Deacon wrote: > [+Marc] > > On Tue, May 19, 2020 at 07:54:51PM +0200, Jean-Philippe Brucker wrote: >> The SMMUv3 can handle invalidation targeted at TLB entries with shared >> ASIDs. If the implementation supports broadcast TLB maintenance, >> enable it >> and keep track of it in a feature bit. The SMMU will then be affected >> by >> inner-shareable TLB invalidations from other agents. >> >> A major side-effect of this change is that stage-2 translation >> contexts >> are now affected by all invalidations by VMID. VMIDs are all shared >> and >> the only ways to prevent over-invalidation, since the stage-2 page >> tables >> are not shared between CPU and SMMU, are to either disable BTM or >> allocate >> different VMIDs. This patch does not address the problem. > > This sounds like a potential performance issue, particularly as we > expose > stage-2 contexts via VFIO directly. Maybe we could reserve some portion > of > VMID space for the SMMU? Marc, what do you reckon? Certainly doable when we have 16bits VMIDs. With smaller VMID spaces (like on v8.0), this is a bit more difficult (we do have pretty large v8.0 systems around). How many VMID bits are we talking about? M. -- Jazz is not dead. It just smells funny... _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu