From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com, chao.hao@mediatek.com,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com,
anan.sun@mediatek.com, Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 05/23] dt-bindings: memory: mediatek: Add domain definition
Date: Sat, 5 Sep 2020 16:09:02 +0800 [thread overview]
Message-ID: <20200905080920.13396-6-yong.wu@mediatek.com> (raw)
In-Reply-To: <20200905080920.13396-1-yong.wu@mediatek.com>
In the latest SoC, there are several HW IP require a sepecial iova
range, mainly CCU and VPU has this requirement. Take CCU as a example,
CCU require its iova locate in the range(0x4000_0000 ~ 0x43ff_ffff).
In this patch we add a domain definition for the special port. In the
example of CCU, If we preassign CCU port in domain1, then iommu driver
will prepare a independent iommu domain of the special iova range for it,
then the iova got from dma_alloc_attrs(ccu-dev) will locate in its special
range.
This is a preparing patch for multi-domain support.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
include/dt-bindings/memory/mtk-smi-larb-port.h | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-smi-larb-port.h
index f4d8e3aed0bc..d00f5de8438b 100644
--- a/include/dt-bindings/memory/mtk-smi-larb-port.h
+++ b/include/dt-bindings/memory/mtk-smi-larb-port.h
@@ -7,9 +7,16 @@
#define __DTS_MTK_IOMMU_PORT_H_
#define MTK_LARB_NR_MAX 32
+#define MTK_M4U_DOM_NR_MAX 8
+
+#define MTK_M4U_DOM_ID(domid, larb, port) \
+ (((domid) & 0x7) << 16 | (((larb) & 0x1f) << 5) | ((port) & 0x1f))
+
+/* The default dom id is 0. */
+#define MTK_M4U_ID(larb, port) MTK_M4U_DOM_ID(0, larb, port)
-#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
#define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f)
#define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
+#define MTK_M4U_TO_DOM(id) (((id) >> 16) & 0x7)
#endif
--
2.18.0
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next prev parent reply other threads:[~2020-09-05 8:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-05 8:08 [PATCH v2 00/23] MT8192 IOMMU support Yong Wu
2020-09-05 8:08 ` [PATCH v2 01/23] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-09-14 23:22 ` Rob Herring
2020-09-15 5:49 ` Yong Wu
2020-09-18 16:07 ` Rob Herring
2020-09-05 8:08 ` [PATCH v2 02/23] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-09-14 23:23 ` Rob Herring
2020-09-15 5:55 ` Yong Wu
2020-09-05 8:09 ` [PATCH v2 03/23] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-05 8:09 ` [PATCH v2 04/23] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-05 8:09 ` Yong Wu [this message]
2020-09-05 8:09 ` [PATCH v2 06/23] dt-bindings: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-09-15 0:42 ` Rob Herring
2020-09-05 8:09 ` [PATCH v2 07/23] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-05 8:09 ` [PATCH v2 08/23] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-09-05 8:09 ` [PATCH v2 09/23] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-09-05 8:09 ` [PATCH v2 10/23] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-09-05 8:09 ` [PATCH v2 11/23] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-09-05 8:09 ` [PATCH v2 12/23] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-05 8:09 ` [PATCH v2 13/23] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-05 8:09 ` [PATCH v2 14/23] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-05 8:09 ` [PATCH v2 15/23] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-05 8:09 ` [PATCH v2 16/23] iommu/mediatek: Add single domain Yong Wu
2020-09-05 8:09 ` [PATCH v2 17/23] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-09-05 8:09 ` [PATCH v2 18/23] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-09-05 8:09 ` [PATCH v2 19/23] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-05 8:09 ` [PATCH v2 20/23] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-05 8:09 ` [PATCH v2 21/23] iommu/mediatek: Adjust the structure Yong Wu
2020-09-05 8:09 ` [PATCH v2 22/23] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-05 8:09 ` [PATCH v2 23/23] memory: mtk-smi: " Yong Wu
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