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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>,
	Sanjay Kumar <sanjay.k.kumar@intel.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>,
	Dave Jiang <dave.jiang@intel.com>, Liu Yi L <yi.l.liu@intel.com>
Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/5] iommu/vt-d: Preset A/D bits for user space DMA usage
Date: Tue, 20 Jul 2021 09:38:54 +0800	[thread overview]
Message-ID: <20210720013856.4143880-4-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20210720013856.4143880-1-baolu.lu@linux.intel.com>

We preset the access and dirty bits for IOVA over first level usage only
for the kernel DMA (i.e., when domain type is IOMMU_DOMAIN_DMA). We should
also preset the FL A/D for user space DMA usage. The idea is that even the
user space A/D bit memory write is unnecessary. We should avoid it to
minimize the overhead.

Suggested-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 drivers/iommu/intel/iommu.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 1131b8efb050..f45c80ce2381 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -2339,13 +2339,9 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
 	attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP);
 	attr |= DMA_FL_PTE_PRESENT;
 	if (domain_use_first_level(domain)) {
-		attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US;
-
-		if (domain->domain.type == IOMMU_DOMAIN_DMA) {
-			attr |= DMA_FL_PTE_ACCESS;
-			if (prot & DMA_PTE_WRITE)
-				attr |= DMA_FL_PTE_DIRTY;
-		}
+		attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS;
+		if (prot & DMA_PTE_WRITE)
+			attr |= DMA_FL_PTE_DIRTY;
 	}
 
 	pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
-- 
2.25.1

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  parent reply	other threads:[~2021-07-20  1:41 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-20  1:38 [PATCH 0/5] iommu/vt-d: Several minor adjustments Lu Baolu
2021-07-20  1:38 ` [PATCH 1/5] iommu/vt-d: Refactor Kconfig a bit Lu Baolu
2021-07-20  1:38 ` [PATCH 2/5] iommu/vt-d: Enable Intel IOMMU scalable mode by default Lu Baolu
2021-07-20  1:38 ` Lu Baolu [this message]
2021-07-20  1:38 ` [PATCH 4/5] iommu/vt-d: Disallow SVA if devices don't support 64-bit address Lu Baolu
2021-07-20  9:27   ` Robin Murphy
2021-07-21  1:50     ` Lu Baolu
2021-07-21 11:12       ` Robin Murphy
2021-07-21 14:17         ` Lu Baolu
2021-07-20  1:38 ` [PATCH 5/5] iommu/vt-d: Allow devices to have more than 32 outstanding PRs Lu Baolu

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