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b=itth0U3XqylnOlsFoxH4olvInbkO5+tBOl1EpPuiNx7a7s31w6h/VFvL6WaoDTyW8wN53V /r8AUVOEO+QjEA8nndoMOCZpdzTFxazGw41JTk26uIPxE0IETrJea1IH4DmzWRtaubh8XQ lyFW6kUDhmULmOHnVwsRQeQakXBqWnM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-369-Z6Si8xQgPLCeaoFso_z7uQ-1; Thu, 16 Jul 2020 04:40:54 -0400 X-MC-Unique: Z6Si8xQgPLCeaoFso_z7uQ-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6ED61107ACCA; Thu, 16 Jul 2020 08:40:52 +0000 (UTC) Received: from [10.36.115.54] (ovpn-115-54.ams2.redhat.com [10.36.115.54]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 362D274F64; Thu, 16 Jul 2020 08:40:49 +0000 (UTC) Subject: Re: [PATCH v4 6/7] iommu/vt-d: Warn on out-of-range invalidation address To: Jacob Pan , iommu@lists.linux-foundation.org, LKML , Lu Baolu , Joerg Roedel , David Woodhouse References: <1594080774-33413-1-git-send-email-jacob.jun.pan@linux.intel.com> <1594080774-33413-7-git-send-email-jacob.jun.pan@linux.intel.com> From: Auger Eric Message-ID: <8a0a2896-74f9-94a9-f401-c46d9d157023@redhat.com> Date: Thu, 16 Jul 2020 10:40:48 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <1594080774-33413-7-git-send-email-jacob.jun.pan@linux.intel.com> Content-Language: en-US X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Cc: "Tian, Kevin" , Raj Ashok X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Jacob, On 7/7/20 2:12 AM, Jacob Pan wrote: > For guest requested IOTLB invalidation, address and mask are provided as > part of the invalidation data. VT-d HW silently ignores any address bits > below the mask. SW shall also allow such case but give warning if > address does not align with the mask. This patch relax the fault > handling from error to warning and proceed with invalidation request > with the given mask. > > Fixes: 6ee1b77ba3ac0 ("iommu/vt-d: Add svm/sva invalidate function") > Acked-by: Lu Baolu > Signed-off-by: Jacob Pan following your replies on my v3 comments, Reviewed-by: Eric Auger Thanks Eric > --- > drivers/iommu/intel/iommu.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 3bf03c6cd15f..c3a9a85a3c3f 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -5439,13 +5439,12 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, struct device *dev, > > switch (BIT(cache_type)) { > case IOMMU_CACHE_INV_TYPE_IOTLB: > + /* HW will ignore LSB bits based on address mask */ > if (inv_info->granularity == IOMMU_INV_GRANU_ADDR && > size && > (inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + size)) - 1))) { > - pr_err_ratelimited("Address out of range, 0x%llx, size order %llu\n", > - inv_info->addr_info.addr, size); > - ret = -ERANGE; > - goto out_unlock; > + pr_err_ratelimited("User address not aligned, 0x%llx, size order %llu\n", > + inv_info->addr_info.addr, size); > } > > /* > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu