From: Auger Eric <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
kvmarm@lists.cs.columbia.edu, joro@8bytes.org,
alex.williamson@redhat.com, jacob.jun.pan@linux.intel.com,
yi.l.liu@linux.intel.com, jean-philippe.brucker@arm.com,
will.deacon@arm.com, robin.murphy@arm.com
Cc: kevin.tian@intel.com, ashok.raj@intel.com, marc.zyngier@arm.com,
christoffer.dall@arm.com, peter.maydell@linaro.org
Subject: Re: [PATCH v4 00/22] SMMUv3 Nested Stage Setup
Date: Tue, 5 Mar 2019 17:42:32 +0100 [thread overview]
Message-ID: <b7990ab6-e286-0aee-b15c-4a05fe4eed78@redhat.com> (raw)
In-Reply-To: <20190218135504.25048-1-eric.auger@redhat.com>
Hi,
On 2/18/19 2:54 PM, Eric Auger wrote:
> This series allows a virtualizer to program the nested stage mode.
> This is useful when both the host and the guest are exposed with
> an SMMUv3 and a PCI device is assigned to the guest using VFIO.
>
> In this mode, the physical IOMMU must be programmed to translate
> the two stages: the one set up by the guest (IOVA -> GPA) and the
> one set up by the host VFIO driver as part of the assignment process
> (GPA -> HPA).
>
> On Intel, this is traditionnaly achieved by combining the 2 stages
> into a single physical stage. However this relies on the capability
> to trap on each guest translation structure update. This is possible
> by using the VTD Caching Mode. Unfortunately the ARM SMMUv3 does
> not offer a similar mechanism.
>
> However, the ARM SMMUv3 architecture supports 2 physical stages! Those
> were devised exactly with that use case in mind. Assuming the HW
> implements both stages (optional), the guest now can use stage 1
> while the host uses stage 2.
>
> This assumes the virtualizer has means to propagate guest settings
> to the host SMMUv3 driver. This series brings this VFIO/IOMMU
> infrastructure. Those services are:
> - bind the guest stage 1 configuration to the stream table entry
> - propagate guest TLB invalidations
> - bind MSI IOVAs
> - propagate faults collected at physical level up to the virtualizer
>
> This series largely reuses the user API and infrastructure originally
> devised for SVA/SVM and patches submitted by Jacob, Yi Liu, Tianyu in
> [1-2] and Jean-Philippe [3-4].
>
> Best Regards
>
> Eric
>
> This series can be found at:
> https://github.com/eauger/linux/tree/v5.0-rc7-2stage-v4
For those interested in testing this kernel branch, you can use the
following qemu branch:
https://github.com/eauger/qemu/tree/v3.1.0-2stage-prev3-for-patchv4-testing
I will send an official QEMU RFCv3 asap.
Thanks
Eric
>
> References:
> [1] [PATCH v5 00/23] IOMMU and VT-d driver support for Shared Virtual
> Address (SVA)
> https://lwn.net/Articles/754331/
> [2] [RFC PATCH 0/8] Shared Virtual Memory virtualization for VT-d
> (VFIO part)
> https://lists.linuxfoundation.org/pipermail/iommu/2017-April/021475.html
> [3] [v2,00/40] Shared Virtual Addressing for the IOMMU
> https://patchwork.ozlabs.org/cover/912129/
> [4] [PATCH v3 00/10] Shared Virtual Addressing for the IOMMU
> https://patchwork.kernel.org/cover/10608299/
>
> History:
> v3 -> v4:
> - took into account Alex, jean-Philippe and Robin's comments on v3
> - rework of the smmuv3 driver integration
> - add tear down ops for msi binding and PASID table binding
> - fix S1 fault propagation
> - put fault reporting patches at the beginning of the series following
> Jean-Philippe's request
> - update of the cache invalidate and fault API uapis
> - VFIO fault reporting rework with 2 separate regions and one mmappable
> segment for the fault queue
> - moved to PATCH
>
> v2 -> v3:
> - When registering the S1 MSI binding we now store the device handle. This
> addresses Robin's comment about discimination of devices beonging to
> different S1 groups and using different physical MSI doorbells.
> - Change the fault reporting API: use VFIO_PCI_DMA_FAULT_IRQ_INDEX to
> set the eventfd and expose the faults through an mmappable fault region
>
> v1 -> v2:
> - Added the fault reporting capability
> - asid properly passed on invalidation (fix assignment of multiple
> devices)
> - see individual change logs for more info
>
> Eric Auger (13):
> iommu: Introduce bind/unbind_guest_msi
> vfio: VFIO_IOMMU_BIND/UNBIND_MSI
> iommu/smmuv3: Get prepared for nested stage support
> iommu/smmuv3: Implement attach/detach_pasid_table
> iommu/smmuv3: Implement cache_invalidate
> dma-iommu: Implement NESTED_MSI cookie
> iommu/smmuv3: Implement bind/unbind_guest_msi
> iommu/smmuv3: Report non recoverable faults
> vfio-pci: Add a new VFIO_REGION_TYPE_NESTED region type
> vfio-pci: Register an iommu fault handler
> vfio_pci: Allow to mmap the fault queue
> vfio-pci: Add VFIO_PCI_DMA_FAULT_IRQ_INDEX
> vfio: Document nested stage control
>
> Jacob Pan (4):
> driver core: add per device iommu param
> iommu: introduce device fault data
> iommu: introduce device fault report API
> iommu: Introduce attach/detach_pasid_table API
>
> Jean-Philippe Brucker (2):
> iommu/arm-smmu-v3: Link domains and devices
> iommu/arm-smmu-v3: Maintain a SID->device structure
>
> Liu, Yi L (3):
> iommu: Introduce cache_invalidate API
> vfio: VFIO_IOMMU_ATTACH/DETACH_PASID_TABLE
> vfio: VFIO_IOMMU_CACHE_INVALIDATE
>
> Documentation/vfio.txt | 83 ++++
> drivers/iommu/arm-smmu-v3.c | 580 ++++++++++++++++++++++++++--
> drivers/iommu/dma-iommu.c | 145 ++++++-
> drivers/iommu/iommu.c | 221 ++++++++++-
> drivers/vfio/pci/vfio_pci.c | 214 ++++++++++
> drivers/vfio/pci/vfio_pci_intrs.c | 19 +
> drivers/vfio/pci/vfio_pci_private.h | 20 +
> drivers/vfio/pci/vfio_pci_rdwr.c | 73 ++++
> drivers/vfio/vfio_iommu_type1.c | 158 ++++++++
> include/linux/device.h | 3 +
> include/linux/dma-iommu.h | 18 +
> include/linux/iommu.h | 142 +++++++
> include/uapi/linux/iommu.h | 233 +++++++++++
> include/uapi/linux/vfio.h | 102 +++++
> 14 files changed, 1977 insertions(+), 34 deletions(-)
> create mode 100644 include/uapi/linux/iommu.h
>
prev parent reply other threads:[~2019-03-05 16:42 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-18 13:54 [PATCH v4 00/22] SMMUv3 Nested Stage Setup Eric Auger
2019-02-18 13:54 ` [PATCH v4 01/22] driver core: add per device iommu param Eric Auger
2019-02-18 13:54 ` [PATCH v4 02/22] iommu: introduce device fault data Eric Auger
2019-03-05 14:56 ` Jean-Philippe Brucker
2019-03-06 9:38 ` Auger Eric
2019-03-06 12:08 ` Jean-Philippe Brucker
2019-03-06 11:03 ` Auger Eric
2019-03-06 14:30 ` Auger Eric
2019-03-06 16:07 ` Jean-Philippe Brucker
2019-03-06 17:32 ` Auger Eric
2019-02-18 13:54 ` [PATCH v4 03/22] iommu: introduce device fault report API Eric Auger
2019-03-05 15:03 ` Jean-Philippe Brucker
2019-03-06 23:46 ` Jacob Pan
2019-03-07 11:42 ` Jean-Philippe Brucker
2019-02-18 13:54 ` [PATCH v4 04/22] iommu: Introduce attach/detach_pasid_table API Eric Auger
2019-03-05 15:23 ` Jean-Philippe Brucker
2019-03-05 18:15 ` Auger Eric
2019-02-18 13:54 ` [PATCH v4 05/22] iommu: Introduce cache_invalidate API Eric Auger
2019-03-05 15:28 ` Jean-Philippe Brucker
2019-03-05 18:14 ` Auger Eric
[not found] ` <0e041735-98e8-1d8c-c866-ad23e6cc1db5-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2019-03-06 21:59 ` Jacob Pan
2019-02-18 13:54 ` [PATCH v4 06/22] iommu: Introduce bind/unbind_guest_msi Eric Auger
2019-02-18 13:54 ` [PATCH v4 07/22] vfio: VFIO_IOMMU_ATTACH/DETACH_PASID_TABLE Eric Auger
2019-02-18 13:54 ` [PATCH v4 08/22] vfio: VFIO_IOMMU_CACHE_INVALIDATE Eric Auger
2019-02-18 13:54 ` [PATCH v4 09/22] vfio: VFIO_IOMMU_BIND/UNBIND_MSI Eric Auger
2019-02-18 13:54 ` [PATCH v4 10/22] iommu/arm-smmu-v3: Link domains and devices Eric Auger
2019-02-18 13:54 ` [PATCH v4 11/22] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2019-02-18 13:54 ` [PATCH v4 12/22] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2019-02-18 13:54 ` [PATCH v4 13/22] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2019-02-18 13:54 ` [PATCH v4 14/22] iommu/smmuv3: Implement cache_invalidate Eric Auger
2019-02-18 13:54 ` [PATCH v4 15/22] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2019-02-18 13:54 ` [PATCH v4 16/22] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2019-02-18 13:54 ` [PATCH v4 17/22] iommu/smmuv3: Report non recoverable faults Eric Auger
2019-02-18 13:54 ` [PATCH v4 18/22] vfio-pci: Add a new VFIO_REGION_TYPE_NESTED region type Eric Auger
2019-02-18 13:55 ` [PATCH v4 19/22] vfio-pci: Register an iommu fault handler Eric Auger
2019-02-25 14:22 ` Vincent Stehlé
2019-02-25 17:30 ` Auger Eric
2019-02-18 13:55 ` [PATCH v4 20/22] vfio_pci: Allow to mmap the fault queue Eric Auger
2019-02-18 13:55 ` [PATCH v4 21/22] vfio-pci: Add VFIO_PCI_DMA_FAULT_IRQ_INDEX Eric Auger
2019-02-18 13:55 ` [PATCH v4 22/22] vfio: Document nested stage control Eric Auger
2019-03-05 8:07 ` [PATCH v4 00/22] SMMUv3 Nested Stage Setup Auger Eric
2019-03-05 16:42 ` Auger Eric [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b7990ab6-e286-0aee-b15c-4a05fe4eed78@redhat.com \
--to=eric.auger@redhat.com \
--cc=alex.williamson@redhat.com \
--cc=ashok.raj@intel.com \
--cc=christoffer.dall@arm.com \
--cc=eric.auger.pro@gmail.com \
--cc=iommu@lists.linux-foundation.org \
--cc=jacob.jun.pan@linux.intel.com \
--cc=jean-philippe.brucker@arm.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-kernel@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=peter.maydell@linaro.org \
--cc=robin.murphy@arm.com \
--cc=will.deacon@arm.com \
--cc=yi.l.liu@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).