Re: [PATCH 0/5] Rewrite Motorola MMU page-table layout

[Peter Zijlstra <peterz@infradead.org>]

On Fri, Jan 31, 2020 at 11:22:39AM +0100, Peter Zijlstra wrote:
> On Fri, Jan 31, 2020 at 09:38:13AM +0000, Will Deacon wrote:
> 
> > > This series breaks compilation for the ColdFire (with MMU) variant of
> > > the m68k family:
> 
> That's like the same I had reported by the build robots for sun3, which
> I fixed by frobbing pgtable_t. That said, this is probably a more
> consistent change.
> 
> One note below:
> 
> 
> > -static inline struct page *pte_alloc_one(struct mm_struct *mm)
> > +static inline pgtable_t pte_alloc_one(struct mm_struct *mm)
> >  {
> >  	struct page *page = alloc_pages(GFP_DMA, 0);
> >  	pte_t *pte;
> > @@ -54,20 +55,19 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm)
> >  		return NULL;
> >  	}
> >  
> > -	pte = kmap(page);
> > -	if (pte) {
> > -		clear_page(pte);
> > -		__flush_page_to_ram(pte);
> > -		flush_tlb_kernel_page(pte);
> > -		nocache_page(pte);
> > -	}
> > -	kunmap(page);
> > +	pte = page_address(page);
> > +	clear_page(pte);
> > +	__flush_page_to_ram(pte);
> > +	flush_tlb_kernel_page(pte);
> > +	nocache_page(pte);
> 
> See how it does the nocache dance ^

> So either, alloc_one() shouldn't either, or it's all buggered.

Damn, we weren't going to touch coldfire! :-))

So now I found the coldfire docs, and it looks like this thing is a
software tlb-miss arch, so there is no reason what so ever for this to
be nocache. I'll 'fix' that.