From: Jungo Lin <jungo.lin@mediatek.com>
To: <tfiga@chromium.org>, <hverkuil@xs4all.nl>,
<laurent.pinchart@ideasonboard.com>, <matthias.bgg@gmail.com>,
<mchehab@kernel.org>
Cc: <linux-media@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <srv_heupstream@mediatek.com>,
<ddavenport@chromium.org>, <robh@kernel.org>,
<sean.cheng@mediatek.com>, <sj.huang@mediatek.com>,
<frederic.chen@mediatek.com>, <ryan.yu@mediatek.com>,
<rynn.wu@mediatek.com>, <jungo.lin@mediatek.com>,
<frankie.chiu@mediatek.com>
Subject: [RFC,v3 1/9] dt-bindings: mt8183: Added camera ISP Pass 1
Date: Tue, 11 Jun 2019 11:53:36 +0800 [thread overview]
Message-ID: <20190611035344.29814-2-jungo.lin@mediatek.com> (raw)
In-Reply-To: <20190611035344.29814-1-jungo.lin@mediatek.com>
This patch adds DT binding document for the Pass 1 (P1) unit in
Mediatek's camera ISP system. The Pass 1 unit grabs the sensor data
out from the sensor interface, applies ISP image effects from tuning
data and outputs the image data or statistics data to DRAM.
Signed-off-by: Jungo Lin <jungo.lin@mediatek.com>
---
.../bindings/media/mediatek,camisp.txt | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt
diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
new file mode 100644
index 000000000000..50a8b4d9ac8e
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
@@ -0,0 +1,57 @@
+* Mediatek Image Signal Processor Pass 1 (ISP P1)
+
+The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out
+from the sensor interface, applies ISP effects from tuning data and outputs
+the image data and statistics data to DRAM. Furthermore, Pass 1 unit has
+the ability to output two different resolutions frames at the same time to
+increase the performance of the camera application.
+
+Required properties:
+- compatible: Must be "mediatek,mt8183-camisp" for MT8183.
+- reg: Physical base address of the camera function block registers and
+ length of memory mapped region. Must contain an entry for each entry
+ in reg-names.
+- reg-names: Must include the following entries:
+ "cam_sys": Camsys base function block
+ "cam_uni": Camera UNI function block
+ "cam_a": Single camera ISP P1 hardware module A
+ "cam_b": Single camera ISP P1 hardware module B
+- interrupts: Interrupt number to the CPU.
+- iommus: Shall point to the respective IOMMU block with master port
+ as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+ for details.
+- clocks: A list of phandle and clock specifier pairs as listed
+ in clock-names property, see
+ Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn".
+- mediatek,larb: Must contain the local arbiters in the current SoCs, see
+ Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+ for details.
+- mediatek,scp : The node of system control processor (SCP), see
+ Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details.
+
+Example:
+SoC specific DT entry:
+
+ camisp: camisp@1a000000 {
+ compatible = "mediatek,mt8183-camisp", "syscon";
+ reg = <0 0x1a000000 0 0x1000>,
+ <0 0x1a003000 0 0x1000>,
+ <0 0x1a004000 0 0x2000>,
+ <0 0x1a006000 0 0x2000>;
+ reg-names = "cam_sys",
+ "cam_uni",
+ "cam_a",
+ "cam_b";
+ interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 254 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 255 IRQ_TYPE_LEVEL_LOW>;
+ iommus = <&iommu M4U_PORT_CAM_IMGO>;
+ clocks = <&camsys CLK_CAM_CAM>,
+ <&camsys CLK_CAM_CAMTG>;
+ clock-names = "camsys_cam_cgpdn",
+ "camsys_camtg_cgpdn";
+ mediatek,larb = <&larb3>,
+ <&larb6>;
+ mediatek,scp = <&scp>;
+ };
\ No newline at end of file
--
2.18.0
next prev parent reply other threads:[~2019-06-11 3:54 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 3:53 [RFC,V3 0/9] media: platform: mtk-isp: Add Mediatek ISP Pass 1 driver Jungo Lin
2019-06-11 3:53 ` Jungo Lin [this message]
2019-06-11 3:53 ` [RFC,v3 2/9] dts: arm64: mt8183: Add ISP Pass 1 nodes Jungo Lin
2019-06-11 3:53 ` [RFC,v3 3/9] media: platform: Add Mediatek ISP Pass 1 driver Kconfig Jungo Lin
2019-06-11 3:53 ` [RFC,v3 4/9] media: platform: Add Mediatek ISP P1 image & meta formats Jungo Lin
2019-06-11 3:53 ` [RFC,v3 5/9] media: platform: Add Mediatek ISP P1 V4L2 control Jungo Lin
2019-07-01 5:50 ` Tomasz Figa
2019-07-02 11:34 ` Jungo Lin
2019-06-11 3:53 ` [RFC,v3 6/9] media: platform: Add Mediatek ISP P1 V4L2 functions Jungo Lin
2019-07-10 9:54 ` Tomasz Figa
2019-07-18 4:39 ` Jungo Lin
2019-07-23 10:21 ` Tomasz Figa
2019-07-24 4:31 ` Jungo Lin
2019-07-26 5:49 ` Tomasz Figa
2019-07-29 1:18 ` Jungo Lin
2019-07-29 10:04 ` Tomasz Figa
2019-07-30 1:44 ` Jungo Lin
2019-08-05 9:59 ` Tomasz Figa
2019-06-11 3:53 ` [RFC,v3 7/9] media: platform: Add Mediatek ISP P1 device driver Jungo Lin
2019-07-10 9:56 ` Tomasz Figa
2019-07-20 9:58 ` Jungo Lin
2019-07-25 9:23 ` Tomasz Figa
2019-07-26 7:23 ` Jungo Lin
2019-08-06 9:47 ` Tomasz Figa
2019-08-07 2:11 ` Jungo Lin
2019-08-07 13:25 ` Tomasz Figa
2019-06-11 3:53 ` [RFC,v3 8/9] media: platform: Add Mediatek ISP P1 SCP communication Jungo Lin
2019-07-10 9:58 ` Tomasz Figa
2019-07-21 2:18 ` Jungo Lin
2019-07-25 10:56 ` Tomasz Figa
2019-07-26 8:07 ` Jungo Lin
2019-06-11 3:53 ` [RFC,v3 9/9] media: platform: Add Mediatek ISP P1 shared memory device Jungo Lin
2019-07-01 7:25 ` Tomasz Figa
2019-07-05 3:33 ` Jungo Lin
2019-07-05 4:22 ` Tomasz Figa
2019-07-05 5:44 ` Jungo Lin
2019-07-05 7:59 ` Jungo Lin
2019-07-23 7:20 ` Tomasz Figa
2019-07-23 8:21 ` [RFC, v3 " Jungo Lin
2019-07-26 5:15 ` Tomasz Figa
2019-07-26 7:41 ` Christoph Hellwig
2019-07-26 7:42 ` Tomasz Figa
2019-07-26 11:04 ` Robin Murphy
2019-07-26 11:59 ` Jungo Lin
2019-07-26 14:04 ` Tomasz Figa
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