From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: Maxime Ripard <maxime@cerno.tech>
Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org, linux-clk@vger.kernel.org,
linux-staging@lists.linux.dev, Yong Deng <yong.deng@magewell.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Sakari Ailus <sakari.ailus@linux.intel.com>,
Hans Verkuil <hans.verkuil@cisco.com>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Helen Koike <helen.koike@collabora.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Rob Herring <robh@kernel.org>
Subject: Re: [PATCH 05/22] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port
Date: Tue, 14 Sep 2021 09:43:08 +0200 [thread overview]
Message-ID: <YUBSjBMUk+nQSzRz@aptenodytes> (raw)
In-Reply-To: <20210913080931.opbtx45sxqu52jxe@gilmour>
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Hi,
On Mon 13 Sep 21, 10:09, Maxime Ripard wrote:
> On Fri, Sep 10, 2021 at 08:41:30PM +0200, Paul Kocialkowski wrote:
> > The A31 CSI controller supports two distinct input interfaces:
> > parallel and an external MIPI CSI-2 bridge. The parallel interface
> > is often connected to a set of hardware pins while the MIPI CSI-2
> > bridge is an internal FIFO-ish link. As a result, these two inputs
> > are distinguished as two different ports.
> >
> > Note that only one of the two may be present on a controller instance.
> > For example, the V3s has one controller dedicated to MIPI-CSI2 and one
> > dedicated to parallel.
> >
> > Update the binding with an explicit ports node that holds two distinct
> > port nodes: one for parallel input and one for MIPI CSI-2.
> >
> > This is backward-compatible with the single-port approach that was
> > previously taken for representing the parallel interface port, which
> > stays enumerated as fwnode port 0.
> >
> > Note that additional ports may be added in the future, especially to
> > support feeding the CSI controller's output to the ISP.
> >
> > Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > Acked-by: Maxime Ripard <mripard@kernel.org>
> > ---
> > .../media/allwinner,sun6i-a31-csi.yaml | 75 +++++++++++++++----
> > 1 file changed, 62 insertions(+), 13 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > index 8b568072a069..f4a686b77a38 100644
> > --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
> > @@ -61,6 +61,49 @@ properties:
> >
> > additionalProperties: false
> >
> > + ports:
> > + $ref: /schemas/graph.yaml#/properties/ports
> > +
> > + properties:
> > + port@0:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + description: Parallel input port, connect to a parallel sensor
> > +
> > + properties:
> > + reg:
> > + const: 0
> > +
> > + endpoint:
> > + $ref: video-interfaces.yaml#
> > + unevaluatedProperties: false
> > +
> > + properties:
> > + bus-width:
> > + enum: [ 8, 10, 12, 16 ]
> > +
> > + pclk-sample: true
> > + hsync-active: true
> > + vsync-active: true
> > +
> > + required:
> > + - bus-width
> > +
> > + additionalProperties: false
>
> You don't have to duplicate the entire definition there, you can just
> reference port:
>
> $ref: #/properties/port
And that would reference the local (previous) definition of the port node?
Sounds like a good thing indeed.
> > + port@1:
> > + $ref: /schemas/graph.yaml#/$defs/port-base
> > + description: MIPI CSI-2 bridge input port
> > +
> > + properties:
> > + reg:
> > + const: 1
> > +
> > + endpoint:
> > + $ref: video-interfaces.yaml#
> > + unevaluatedProperties: false
> > +
> > + additionalProperties: false
> > +
>
> port@0 is required?
It shouldn't be required. Does that call for a change here?
> And at the top-level, either ports or port are required too
Yes I guess that is true. Should that be a required+oneOf type of thing?
> > required:
> > - compatible
> > - reg
> > @@ -89,19 +132,25 @@ examples:
> > "ram";
> > resets = <&ccu RST_BUS_CSI>;
> >
> > - port {
> > - /* Parallel bus endpoint */
> > - csi1_ep: endpoint {
> > - remote-endpoint = <&adv7611_ep>;
> > - bus-width = <16>;
> > -
> > - /*
> > - * If hsync-active/vsync-active are missing,
> > - * embedded BT.656 sync is used.
> > - */
> > - hsync-active = <0>; /* Active low */
> > - vsync-active = <0>; /* Active low */
> > - pclk-sample = <1>; /* Rising */
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + /* Parallel bus endpoint */
> > + csi1_ep: endpoint {
> > + remote-endpoint = <&adv7611_ep>;
> > + bus-width = <16>;
> > +
> > + /*
> > + * If hsync-active/vsync-active are missing,
> > + * embedded BT.656 sync is used.
> > + */
> > + hsync-active = <0>; /* Active low */
> > + vsync-active = <0>; /* Active low */
> > + pclk-sample = <1>; /* Rising */
> > + };
> > };
> > };
> > };
>
> I'd keep the original example and add one with the CSI bridge
Understood, will do.
Thanks,
Paul
--
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2021-09-14 7:43 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-10 18:41 [PATCH 00/22] Allwinner A31/A83T MIPI CSI-2 Support and A31 ISP Support Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 01/22] clk: sunxi-ng: v3s: Make the ISP PLL clock public Paul Kocialkowski
2021-09-13 7:54 ` Maxime Ripard
2021-09-13 8:53 ` Paul Kocialkowski
2021-09-16 16:30 ` Maxime Ripard
2021-09-10 18:41 ` [PATCH 02/22] ARM: dts: sun8i: v3s: Parent the CSI module clock to the ISP PLL Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 03/22] dt-bindings: sun6i-a31-mipi-dphy: Add optional direction property Paul Kocialkowski
2021-09-13 8:00 ` Maxime Ripard
2021-09-14 7:39 ` Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 04/22] phy: allwinner: phy-sun6i-mipi-dphy: Support D-PHY Rx mode for MIPI CSI-2 Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 05/22] dt-bindings: media: sun6i-a31-csi: Add MIPI CSI-2 input port Paul Kocialkowski
2021-09-13 8:09 ` Maxime Ripard
2021-09-14 7:43 ` Paul Kocialkowski [this message]
2021-09-14 12:06 ` Maxime Ripard
2021-09-10 18:41 ` [PATCH 06/22] dt-bindings: media: Add Allwinner A31 MIPI CSI-2 bindings documentation Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 07/22] media: sunxi: Add support for the A31 MIPI CSI-2 controller Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 08/22] MAINTAINERS: Add entry for the Allwinner A31 MIPI CSI-2 bridge driver Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 09/22] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Paul Kocialkowski
2021-09-11 2:32 ` Samuel Holland
2021-09-13 7:44 ` Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 10/22] dt-bindings: media: Add Allwinner A83T MIPI CSI-2 bindings documentation Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 11/22] media: sunxi: Add support for the A83T MIPI CSI-2 controller Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 12/22] MAINTAINERS: Add entry for the Allwinner A83T MIPI CSI-2 bridge Paul Kocialkowski
2021-09-10 18:41 ` [PATCH NOT FOR MERGE 13/22] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Paul Kocialkowski
2021-09-11 2:53 ` Chen-Yu Tsai
2021-09-13 7:45 ` Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 14/22] ARM: dts: sun8i: a83t: bananapi-m3: Enable MIPI CSI-2 with OV8865 Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 15/22] media: sunxi: Remove the sun6i-csi driver implementation Paul Kocialkowski
2021-09-13 8:17 ` Maxime Ripard
2021-09-14 8:04 ` Paul Kocialkowski
2021-09-15 19:51 ` Sakari Ailus
2021-09-10 18:41 ` [PATCH 16/22] media: sunxi: Introduce a rewritten sun6i-csi driver Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 17/22] dt-bindings: media: Add Allwinner A31 ISP bindings documentation Paul Kocialkowski
2021-09-13 8:18 ` Maxime Ripard
2021-09-14 7:44 ` Paul Kocialkowski
2021-09-14 12:07 ` Maxime Ripard
2021-09-10 18:41 ` [PATCH 18/22] dt-bindings: media: sun6i-a31-csi: Add ISP output port Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 19/22] soc: sunxi: mbus: Add A31 ISP compatibles to the list Paul Kocialkowski
2021-09-11 2:36 ` Samuel Holland
2021-09-13 7:45 ` Paul Kocialkowski
2021-09-13 8:32 ` Maxime Ripard
2021-09-10 18:41 ` [PATCH 20/22] staging: media: Add support for the Allwinner A31 ISP Paul Kocialkowski
2021-09-13 8:31 ` Maxime Ripard
2021-09-14 7:50 ` Paul Kocialkowski
2021-09-14 11:11 ` Laurent Pinchart
2021-09-14 11:48 ` Maxime Ripard
2021-09-10 18:41 ` [PATCH 21/22] MAINTAINERS: Add entry for the Allwinner A31 ISP driver Paul Kocialkowski
2021-09-10 18:41 ` [PATCH 22/22] ARM: dts: sun8i: v3s: Add support for the ISP Paul Kocialkowski
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