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Mon, 10 Feb 2020 23:44:02 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Feb 2020 23:36:15 -0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 11 Feb 2020 15:35:03 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 11 Feb 2020 15:36:19 +0800 Message-ID: <1581406566.14120.46.camel@mtksdaap41> Subject: Re: [PATCH v6 1/3] dt-bindings: soc: add mtk svs dt-bindings From: Roger Lu To: Rob Herring , Nicolas Boichat Date: Tue, 11 Feb 2020 15:36:06 +0800 In-Reply-To: References: <20200107070154.1574-1-roger.lu@mediatek.com> <20200107070154.1574-2-roger.lu@mediatek.com> <20200108203829.GA18987@bogus> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200210_234410_691340_30C59F27 X-CRM114-Status: GOOD ( 31.90 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nicolas Boichat , Angus Lin =?UTF-8?Q?=28=E6=9E=97=E7=91=9B=E8=B1=AA=29?= , Kevin Hilman , Stephen Boyd , jamesjj.liao@mediatek.com, "open list:THERMAL" , lkml , HenryC Chen =?UTF-8?Q?=28=E9=99=B3=E5=BB=BA=E8=B1=AA=29?= , YT Lee =?UTF-8?Q?=28=E6=9D=8E=E4=BB=B0=E5=93=B2=29?= , Fan Chen =?UTF-8?Q?=28=E9=99=B3=E5=87=A1=29?= , Devicetree List , "moderated list:ARM/Mediatek SoC support" , Xiaoqing Liu =?UTF-8?Q?=28=E5=88=98=E6=99=93=E5=BA=86=29?= , Charles Yang =?UTF-8?Q?=28=E6=A5=8A=E4=BA=8E=E9=80=B2=29?= , Matthias Brugger , Nishanth Menon , linux-arm Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi Rob & Nicolas, Sorry for the late reply. On Mon, 2020-01-13 at 23:50 +0800, Rob Herring wrote: > On Mon, Jan 13, 2020 at 12:44 AM Nicolas Boichat wrote: > > > > On Thu, Jan 9, 2020 at 4:38 AM Rob Herring wrote: > > > > > > On Tue, Jan 07, 2020 at 03:01:52PM +0800, Roger Lu wrote: > > > > Document the binding for enabling mtk svs on MediaTek SoC. > > > > > > > > Signed-off-by: Roger Lu > > > > --- > > > > .../devicetree/bindings/power/mtk-svs.txt | 76 +++++++++++++++++++ > > > > 1 file changed, 76 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/power/mtk-svs.txt > > > > > > > > diff --git a/Documentation/devicetree/bindings/power/mtk-svs.txt b/Documentation/devicetree/bindings/power/mtk-svs.txt > > > > new file mode 100644 > > > > index 000000000000..9a3e81b9e1d2 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/power/mtk-svs.txt > > > > @@ -0,0 +1,76 @@ > > > > +* Mediatek Smart Voltage Scaling (MTK SVS) > > > > + > > > > +This describes the device tree binding for the MTK SVS controller (bank) > > > > +which helps provide the optimized CPU/GPU/CCI voltages. This device also > > > > +needs thermal data to calculate thermal slope for accurately compensate > > > > +the voltages when temperature change. > > > > + > > > > +Required properties: > > > > +- compatible: > > > > + - "mediatek,mt8183-svs" : For MT8183 family of SoCs > > > > +- reg: Address range of the MTK SVS controller. > > > > +- interrupts: IRQ for the MTK SVS controller. > > > > +- clocks, clock-names: Clocks needed for the svs hardware. required > > > > + clocks are: > > > > + "main": Main clock for svs controller to work. > > > > +- nvmem-cells: Phandle to the calibration data provided by a nvmem device. > > > > +- nvmem-cell-names: Should be "svs-calibration-data" and "calibration-data" > > > > + > > > > +Subnodes: > > > > +- svs-cpu-little: SVS bank device node of little CPU > > > > + compatible: "mediatek,mt8183-svs-cpu-little" > > > > + operating-points-v2: OPP table hooked by SVS little CPU bank. > > > > + SVS will optimze this OPP table voltage part. > > > > + vcpu-little-supply: PMIC buck of little CPU > > > > +- svs-cpu-big: SVS bank device node of big CPU > > > > + compatible: "mediatek,mt8183-svs-cpu-big" > > > > + operating-points-v2: OPP table hooked by SVS big CPU bank. > > > > + SVS will optimze this OPP table voltage part. > > > > + vcpu-big-supply: PMIC buck of big CPU > > > > +- svs-cci: SVS bank device node of CCI > > > > + compatible: "mediatek,mt8183-svs-cci" > > > > + operating-points-v2: OPP table hooked by SVS CCI bank. > > > > + SVS will optimze this OPP table voltage part. > > > > + vcci-supply: PMIC buck of CCI > > > > +- svs-gpu: SVS bank device node of GPU > > > > + compatible: "mediatek,mt8183-svs-gpu" > > > > + operating-points-v2: OPP table hooked by SVS GPU bank. > > > > + SVS will optimze this OPP table voltage part. > > > > + vgpu-supply: PMIC buck of GPU > > > > + > > > > +Example: > > > > + > > > > + svs: svs@1100b000 { > > > > + compatible = "mediatek,mt8183-svs"; > > > > + reg = <0 0x1100b000 0 0x1000>; > > > > + interrupts = ; > > > > + clocks = <&infracfg CLK_INFRA_THERM>; > > > > + clock-names = "main_clk"; > > > > + nvmem-cells = <&svs_calibration>, <&thermal_calibration>; > > > > + nvmem-cell-names = "svs-calibration-data", "calibration-data"; > > > > + > > > > + svs_cpu_little: svs-cpu-little { > > > > + compatible = "mediatek,mt8183-svs-cpu-little"; > > > > + operating-points-v2 = <&cluster0_opp>; > > > > + vcpu-little-supply = <&mt6358_vproc12_reg>; > > > > + }; > > > > > > I don't think this is a good binding. This information already exists > > > elsewhere in the DT, so your driver should just look in those nodes. > > > For example the regulator can be in the cpu nodes or the OPP table > > > itself. > > > > Roger, if that helps, without changing any other binding, on 8183, > > basically you could have: > > - svs-cpu-little: Add a handle to &cpu0 and get the regulator/opp > > table from it. > > - svs-cpu-big: Handle to &cpu4 > > Why do you need those? Use the compatible of the cpus to determine big > and little cores. Or there's the cpu capacity property that could be > used instead. > > > - svs-cci: Handle to &cci > > Is there more than 1 CCI? Just retrieve the node by the compatible. > There's no need to have nodes that simply serve as a collection of > data for some driver. > > > - svs-gpu: Handle to &gpu (BTW, it is expected that SVS would only > > apply to vgpu/mali regulator, and not vsram regulator?) svs-gpu depends on vgpu power on for init (don't care vgpu_sram). After svs-gpu init is done, it doesn't need vgpu power on anymore. (vgpu can be turned off) Please allows me to introduce more about what svs-gpu device needs. 1. It needs gpu opp table from "gpu node" and gpu_core2 power-domains from "gpu_core2 node". When svs-gpu has those resources, it turns on gpu_core2 power-domain for svs-gpu-hw to have power (for calculating) and svs-gpu-sw will update gpu opp table voltages' part. 2. Therefore, if I retrieve gpu-related node from phandle or compatible, it means svs-gpu device in driver needs to attach two different gpu nodes for attaining gpu opp table and gpu_core2 power-domains. I think this architecture of svs-gpu confuses maintainer why it attaches two different nodes instead of having a device to describe what it needs. 3. Is it acceptable to have a Linux device attaching two different nodes? If yes, could you guide us some APIs for one device to attach two nodes? I don't know how to implement it. Thanks. > > > > I'm not too sure how we'd fetch the right regulator name, however (for > > the first 3 the name is "proc", for the last one it's "mali"), maybe > > add a regulator-name list in the DT? > > To put this another way, write an SoC specific driver that understands > to some extent what exists in the SoC (and DT). I doubt something like > this is going to be generic across more than a few SoCs at most. > > Rob _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek