Hi Zhou, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on pinctrl/devel] [also build test WARNING on v5.4-rc8 next-20191122] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Zhou-Yanjie/pinctrl-Ingenic-Fix-bugs-in-X1000-and-X1500/20191125-041127 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel config: sh-allmodconfig (attached as .config) compiler: sh4-linux-gcc (GCC) 7.4.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.4.0 make.cross ARCH=sh If you fix the issue, kindly add following tag Reported-by: kbuild test robot All warnings (new ones prefixed by >>): drivers/pinctrl/pinctrl-ingenic.c: In function 'ingenic_set_bias': >> drivers/pinctrl/pinctrl-ingenic.c:2145:11: warning: 'return' with a value, in function returning void return -EINVAL; ^ drivers/pinctrl/pinctrl-ingenic.c:2104:13: note: declared here static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, ^~~~~~~~~~~~~~~~ drivers/pinctrl/pinctrl-ingenic.c:2149:11: warning: 'return' with a value, in function returning void return -EINVAL; ^ drivers/pinctrl/pinctrl-ingenic.c:2104:13: note: declared here static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, ^~~~~~~~~~~~~~~~ vim +/return +2145 drivers/pinctrl/pinctrl-ingenic.c 2103 2104 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, 2105 unsigned int pin, unsigned int bias) 2106 { 2107 if (jzpc->version >= ID_X1830) { 2108 unsigned int idx = pin % PINS_PER_GPIO_CHIP; 2109 unsigned int offt = pin / PINS_PER_GPIO_CHIP; 2110 2111 if (bias == GPIO_HIZ) { 2112 if (idx < (PINS_PER_GPIO_CHIP / 2)) 2113 regmap_write(jzpc->map, offt * 0x1000 + 2114 REG_CLEAR(X1830_GPIO_PEL0), BIT(idx * 2) * 3); 2115 else 2116 regmap_write(jzpc->map, offt * 0x1000 + 2117 REG_CLEAR(X1830_GPIO_PEL1), BIT(idx % 16 * 2) * 3); 2118 } else if (bias == GPIO_PULLUP) { 2119 if (idx < (PINS_PER_GPIO_CHIP / 2)) { 2120 regmap_write(jzpc->map, offt * 0x1000 + 2121 REG_SET(X1830_GPIO_PEL0), BIT(idx * 2)); 2122 regmap_write(jzpc->map, offt * 0x1000 + 2123 REG_CLEAR(X1830_GPIO_PEL0), BIT(idx * 2) * 2); 2124 } else { 2125 regmap_write(jzpc->map, offt * 0x1000 + 2126 REG_SET(X1830_GPIO_PEL1), BIT(idx % 16 * 2)); 2127 regmap_write(jzpc->map, offt * 0x1000 + 2128 REG_CLEAR(X1830_GPIO_PEL1), BIT(idx % 16 * 2) * 2); 2129 } 2130 } else { 2131 if (idx < (PINS_PER_GPIO_CHIP / 2)) { 2132 regmap_write(jzpc->map, offt * 0x1000 + 2133 REG_CLEAR(X1830_GPIO_PEL0), BIT(idx * 2)); 2134 regmap_write(jzpc->map, offt * 0x1000 + 2135 REG_SET(X1830_GPIO_PEL0), BIT(idx * 2) * 2); 2136 } else { 2137 regmap_write(jzpc->map, offt * 0x1000 + 2138 REG_CLEAR(X1830_GPIO_PEL1), BIT(idx % 16 * 2)); 2139 regmap_write(jzpc->map, offt * 0x1000 + 2140 REG_SET(X1830_GPIO_PEL1), BIT(idx % 16 * 2) * 2); 2141 } 2142 } 2143 } else if (jzpc->version >= ID_JZ4760) { 2144 if (bias == GPIO_HIZ) > 2145 return -EINVAL; 2146 ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PEN, !bias); 2147 } else { 2148 if (bias == GPIO_HIZ) 2149 return -EINVAL; 2150 ingenic_config_pin(jzpc, pin, JZ4740_GPIO_PULL_DIS, !bias); 2151 } 2152 } 2153 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation