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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com, tsbogend@alpha.franken.de,
	john.garry@huawei.com, Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH v3 1/3] MIPS: Move VMALLOC_START into spaces.h
Date: Thu, 30 Apr 2020 08:57:04 +0800	[thread overview]
Message-ID: <20200430005706.2520124-1-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20200426114806.1176629-1-jiaxun.yang@flygoat.com>

That would allow us modify kernel vm address spaces without
step into the hell of includes.

Also move some page defines into page-def.h to allow PAGE_SIZE
to be used in spaces.h.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/include/asm/mach-generic/spaces.h | 12 +++++++++
 arch/mips/include/asm/page-def.h            | 28 +++++++++++++++++++++
 arch/mips/include/asm/page.h                | 21 ----------------
 arch/mips/include/asm/pgtable-32.h          |  2 --
 arch/mips/include/asm/pgtable-64.h          |  6 -----
 5 files changed, 40 insertions(+), 29 deletions(-)
 create mode 100644 arch/mips/include/asm/page-def.h

diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h
index ee5ebe98f6cf..44fefde46a10 100644
--- a/arch/mips/include/asm/mach-generic/spaces.h
+++ b/arch/mips/include/asm/mach-generic/spaces.h
@@ -13,6 +13,7 @@
 #include <linux/const.h>
 
 #include <asm/mipsregs.h>
+#include <asm/page-def.h>
 
 /*
  * This gives the physical RAM offset.
@@ -103,4 +104,15 @@
 #endif
 #endif
 
+#ifdef CONFIG_64BIT
+/*
+ * TLB refill handlers also map the vmalloc area into xuseg.  Avoid
+ * the first couple of pages so NULL pointer dereferences will still
+ * reliably trap.
+ */
+#define VMALLOC_START		(MAP_BASE + (2 * PAGE_SIZE))
+#else
+#define VMALLOC_START	  MAP_BASE
+#endif
+
 #endif /* __ASM_MACH_GENERIC_SPACES_H */
diff --git a/arch/mips/include/asm/page-def.h b/arch/mips/include/asm/page-def.h
new file mode 100644
index 000000000000..6506b611f44b
--- /dev/null
+++ b/arch/mips/include/asm/page-def.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_PAGE_DEF_H
+#define __ASM_PAGE_DEF_H
+
+#include <linux/const.h>
+
+/*
+ * PAGE_SHIFT determines the page size
+ */
+#ifdef CONFIG_PAGE_SIZE_4KB
+#define PAGE_SHIFT	12
+#endif
+#ifdef CONFIG_PAGE_SIZE_8KB
+#define PAGE_SHIFT	13
+#endif
+#ifdef CONFIG_PAGE_SIZE_16KB
+#define PAGE_SHIFT	14
+#endif
+#ifdef CONFIG_PAGE_SIZE_32KB
+#define PAGE_SHIFT	15
+#endif
+#ifdef CONFIG_PAGE_SIZE_64KB
+#define PAGE_SHIFT	16
+#endif
+#define PAGE_SIZE	(_AC(1, UL) << PAGE_SHIFT)
+#define PAGE_MASK	(~((1 << PAGE_SHIFT) - 1))
+
+#endif /* __ASM_PAGE_DEF_H */
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index e2f503fc7a84..07f6a55eec5d 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -14,27 +14,6 @@
 #include <linux/kernel.h>
 #include <asm/mipsregs.h>
 
-/*
- * PAGE_SHIFT determines the page size
- */
-#ifdef CONFIG_PAGE_SIZE_4KB
-#define PAGE_SHIFT	12
-#endif
-#ifdef CONFIG_PAGE_SIZE_8KB
-#define PAGE_SHIFT	13
-#endif
-#ifdef CONFIG_PAGE_SIZE_16KB
-#define PAGE_SHIFT	14
-#endif
-#ifdef CONFIG_PAGE_SIZE_32KB
-#define PAGE_SHIFT	15
-#endif
-#ifdef CONFIG_PAGE_SIZE_64KB
-#define PAGE_SHIFT	16
-#endif
-#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK	(~((1 << PAGE_SHIFT) - 1))
-
 /*
  * This is used for calculating the real page sizes
  * for FTLB or VTLB + FTLB configurations.
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
index 1945c8970141..40049fda596b 100644
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -95,8 +95,6 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
 #define USER_PTRS_PER_PGD	(0x80000000UL/PGDIR_SIZE)
 #define FIRST_USER_ADDRESS	0UL
 
-#define VMALLOC_START	  MAP_BASE
-
 #define PKMAP_END	((FIXADDR_START) & ~((LAST_PKMAP << PAGE_SHIFT)-1))
 #define PKMAP_BASE	(PKMAP_END - PAGE_SIZE * LAST_PKMAP)
 
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index ee5dc0c145b9..a3fb463ba86a 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -139,12 +139,6 @@
 #define USER_PTRS_PER_PGD       ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
 #define FIRST_USER_ADDRESS	0UL
 
-/*
- * TLB refill handlers also map the vmalloc area into xuseg.  Avoid
- * the first couple of pages so NULL pointer dereferences will still
- * reliably trap.
- */
-#define VMALLOC_START		(MAP_BASE + (2 * PAGE_SIZE))
 #define VMALLOC_END	\
 	(MAP_BASE + \
 	 min(PTRS_PER_PGD * PTRS_PER_PUD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
-- 
2.26.0.rc2


  parent reply	other threads:[~2020-04-30  0:57 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-26 11:47 [PATCH 0/4] MIPS: Loongson64: Use logic_pio Jiaxun Yang
2020-04-26 11:47 ` [PATCH 1/4] MIPS: Massage address spaces headers Jiaxun Yang
2020-04-26 11:47 ` [PATCH 2/4] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-26 11:47 ` [PATCH 3/4] lib: logic_pio: Introduce MMIO_LOWER_RESERVED Jiaxun Yang
2020-04-27 10:43   ` John Garry
2020-04-27 11:03     ` Jiaxun Yang
2020-04-27 11:54       ` John Garry
2020-04-27 12:21         ` Jiaxun Yang
2020-04-26 11:47 ` [PATCH 4/4] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-04-30  0:57 ` Jiaxun Yang [this message]
2020-04-30  0:57   ` [PATCH v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-04-30  0:57   ` [PATCH v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2020-05-08 11:44 ` [PATCH RESEND v3 1/3] MIPS: Move VMALLOC_START into spaces.h Jiaxun Yang
2020-05-08 11:44   ` [PATCH RESEND v3 2/3] MIPS: Introduce PCI_IO_VMMAP Jiaxun Yang
2020-05-08 16:11     ` Thomas Bogendoerfer
2020-05-08 16:22       ` Jiaxun Yang
2020-05-08 16:52         ` Thomas Bogendoerfer
2020-05-08 17:09           ` Jiaxun Yang
2020-05-14 14:21             ` Thomas Bogendoerfer
2020-05-14 14:56               ` Jiaxun Yang
2020-05-14 13:20     ` Jiaxun Yang
2020-05-08 11:44   ` [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP Jiaxun Yang
2021-01-13 18:02     ` logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP) John Garry
2021-01-14  0:13       ` Jiaxun Yang
2021-01-14  9:18         ` John Garry
2021-01-14 11:10           ` Jiaxun Yang
2021-01-14 11:20             ` John Garry

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