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From: WANG Xuerui <git@xen0n.name>
To: linux-mips@vger.kernel.org
Cc: WANG Xuerui <git@xen0n.name>, Huacai Chen <chenhc@lemote.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: [PATCH v2 2/3] MIPS: add definitions for Loongson-specific CP0.Diag1 register
Date: Wed, 22 Jul 2020 02:37:38 +0800	[thread overview]
Message-ID: <20200721183739.1410221-3-git@xen0n.name> (raw)
In-Reply-To: <20200721183739.1410221-1-git@xen0n.name>

This register is named GSCause in Loongson manuals. It carries Loongson
extended exception information.

Signed-off-by: WANG Xuerui <git@xen0n.name>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 arch/mips/include/asm/mipsregs.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 11094d857b92..5ba268266d16 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -86,6 +86,7 @@
 #define CP0_XCONTEXT $20
 #define CP0_FRAMEMASK $21
 #define CP0_DIAGNOSTIC $22
+#define CP0_DIAGNOSTIC1 $22, 1
 #define CP0_DEBUG $23
 #define CP0_DEPC $24
 #define CP0_PERFORMANCE $25
@@ -1051,6 +1052,13 @@
 /* Flush FTLB */
 #define LOONGSON_DIAG_FTLB	(_ULCAST_(1) << 13)
 
+/*
+ * Diag1 (GSCause in Loongson-speak) fields
+ */
+/* Loongson-specific exception code (GSExcCode) */
+#define LOONGSON_DIAG1_EXCCODE_SHIFT	2
+#define LOONGSON_DIAG1_EXCCODE		GENMASK(6, 2)
+
 /* CvmCtl register field definitions */
 #define CVMCTL_IPPCI_SHIFT	7
 #define CVMCTL_IPPCI		(_U64CAST_(0x7) << CVMCTL_IPPCI_SHIFT)
-- 
2.25.1


  parent reply	other threads:[~2020-07-21 18:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-21 18:37 [PATCH v2 0/3] Refactor FTLBPar exception handling and add GSExc handler WANG Xuerui
2020-07-21 18:37 ` [PATCH v2 1/3] MIPS: only register FTLBPar exception handler for supported models WANG Xuerui
2020-07-21 18:37 ` WANG Xuerui [this message]
2020-07-21 18:37 ` [PATCH v2 3/3] MIPS: handle Loongson-specific GSExc exception WANG Xuerui
2020-07-22  4:20   ` Huacai Chen
2020-07-22  6:17     ` WANG Xuerui

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