From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: linux-mips@vger.kernel.org
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>,
Rob Herring <robh+dt@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Huacai Chen <chenhc@lemote.com>,
Frank Rowand <frowand.list@gmail.com>,
Paul Burton <paulburton@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Arnd Bergmann <arnd@arndb.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 2/5] MIPS: Loongson64: Process ISA Node in DeviceTree
Date: Tue, 28 Jul 2020 23:36:56 +0800 [thread overview]
Message-ID: <20200728153708.1296374-3-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20200728153708.1296374-1-jiaxun.yang@flygoat.com>
Previously, we're hardcoding reserved ISA I/O Space in, now
we're processing it I/O via DeviceTree directly.
The ranges property if ISA node is used to determine the size and address
of reserved I/O space.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
--
v2: Use range_parser instead of pci_range_parser
v4: Fix typos & grammar problem thanks to Xuerui.
---
arch/mips/loongson64/init.c | 87 ++++++++++++++++++++++++++-----------
1 file changed, 62 insertions(+), 25 deletions(-)
diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
index 59ddadace83f..8ba22c30f312 100644
--- a/arch/mips/loongson64/init.c
+++ b/arch/mips/loongson64/init.c
@@ -7,6 +7,8 @@
#include <linux/irqchip.h>
#include <linux/logic_pio.h>
#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <asm/bootinfo.h>
#include <asm/traps.h>
#include <asm/smp-ops.h>
@@ -63,41 +65,76 @@ void __init prom_free_prom_memory(void)
{
}
-static __init void reserve_pio_range(void)
+static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start,
+ resource_size_t size)
{
+ int ret = 0;
struct logic_pio_hwaddr *range;
+ unsigned long vaddr;
range = kzalloc(sizeof(*range), GFP_ATOMIC);
if (!range)
- return;
+ return -ENOMEM;
- range->fwnode = &of_root->fwnode;
- range->size = MMIO_LOWER_RESERVED;
- range->hw_start = LOONGSON_PCIIO_BASE;
+ range->fwnode = fwnode;
+ range->size = size;
+ range->hw_start = hw_start;
range->flags = LOGIC_PIO_CPU_MMIO;
- if (logic_pio_register_range(range)) {
- pr_err("Failed to reserve PIO range for legacy ISA\n");
- goto free_range;
+ ret = logic_pio_register_range(range);
+ if (ret) {
+ kfree(range);
+ return ret;
+ }
+
+ /* Legacy ISA must placed at the start of PCI_IOBASE */
+ if (range->io_start != 0) {
+ logic_pio_unregister_range(range);
+ kfree(range);
+ return -EINVAL;
}
- if (WARN(range->io_start != 0,
- "Reserved PIO range does not start from 0\n"))
- goto unregister;
-
- /*
- * i8259 would access I/O space, so mapping must be done here.
- * Please remove it when all drivers can be managed by logic_pio.
- */
- ioremap_page_range(PCI_IOBASE, PCI_IOBASE + MMIO_LOWER_RESERVED,
- LOONGSON_PCIIO_BASE,
- pgprot_device(PAGE_KERNEL));
-
- return;
-unregister:
- logic_pio_unregister_range(range);
-free_range:
- kfree(range);
+ vaddr = PCI_IOBASE + range->io_start;
+
+ ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));
+
+ return 0;
+}
+
+static __init void reserve_pio_range(void)
+{
+ struct device_node *np;
+
+ for_each_node_by_name(np, "isa") {
+ struct of_range range;
+ struct of_range_parser parser;
+
+ pr_info("ISA Bridge: %pOF\n", np);
+
+ if (of_range_parser_init(&parser, np)) {
+ pr_info("Failed to parse resources.\n");
+ break;
+ }
+
+ for_each_of_range(&parser, &range) {
+ switch (range.flags & IORESOURCE_TYPE_BITS) {
+ case IORESOURCE_IO:
+ pr_info(" IO 0x%016llx..0x%016llx -> 0x%016llx\n",
+ range.cpu_addr,
+ range.cpu_addr + range.size - 1,
+ range.bus_addr);
+ if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size))
+ pr_warn("Failed to reserve legacy IO in Logic PIO\n");
+ break;
+ case IORESOURCE_MEM:
+ pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx\n",
+ range.cpu_addr,
+ range.cpu_addr + range.size - 1,
+ range.bus_addr);
+ break;
+ }
+ }
+ }
}
void __init arch_init_irq(void)
--
2.28.0.rc1
next prev parent reply other threads:[~2020-07-28 15:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 15:36 [PATCH v4 0/5] MIPS: Loongson64: Process ISA Node in DeviceTree Jiaxun Yang
2020-07-28 15:36 ` [PATCH v4 1/5] of_address: Add bus type match for pci ranges parser Jiaxun Yang
2020-08-14 18:21 ` Marc Zyngier
2020-08-14 22:51 ` Rob Herring
2020-08-15 11:22 ` Marc Zyngier
2020-07-28 15:36 ` Jiaxun Yang [this message]
2020-07-28 15:36 ` [PATCH v4 3/5] MIPS: Loongson64: Enlarge IO_SPACE_LIMIT Jiaxun Yang
2020-07-28 15:36 ` [PATCH v4 4/5] MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH Jiaxun Yang
2020-07-28 15:36 ` [PATCH v4 5/5] MIPS: Loongson64: Add ISA node for LS7A PCH Jiaxun Yang
2020-07-28 20:52 ` [PATCH v4 0/5] MIPS: Loongson64: Process ISA Node in DeviceTree Thomas Bogendoerfer
2020-07-29 1:48 ` Jiaxun Yang
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