From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: tsbogend@alpha.franken.de, robh+dt@kernel.org,
paul@crapouillou.net, paulburton@kernel.org
Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
devicetree@vger.kernel.org, jiaxun.yang@flygoat.com,
Sergey.Semin@baikalelectronics.ru, akpm@linux-foundation.org,
rppt@kernel.org, dongsheng.qiu@ingenic.com,
aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
yanfei.li@ingenic.com, sernia.zhou@foxmail.com,
zhenwenjin@gmail.com
Subject: [PATCH v3 1/3] dt-bindings: MIPS: Add X2000E based CU2000-Neo.
Date: Tue, 22 Sep 2020 09:24:42 +0800 [thread overview]
Message-ID: <20200922012444.44089-2-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <20200922012444.44089-1-zhouyanjie@wanyeetech.com>
Add bindings for Ingenic X2000E based board, prepare for later dts.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v3:
New patch.
Documentation/devicetree/bindings/mips/ingenic/devices.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml
index 83c86cbe4716..dc21b4630c25 100644
--- a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml
+++ b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml
@@ -47,4 +47,9 @@ properties:
items:
- const: yna,cu1830-neo
- const: ingenic,x1830
+
+ - description: YSH & ATIL General Board, CU2000 Module with Neo Backplane
+ items:
+ - const: yna,cu2000-neo
+ - const: ingenic,x2000e
...
--
2.11.0
next prev parent reply other threads:[~2020-09-22 1:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-22 1:24 [PATCH v3 0/3] Repair Ingenic SoCs L2 cache capacity detection 周琰杰 (Zhou Yanjie)
2020-09-22 1:24 ` 周琰杰 (Zhou Yanjie) [this message]
2020-09-22 1:24 ` [PATCH v3 2/3] MIPS: Ingenic: Add system type for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-09-22 1:24 ` [PATCH v3 3/3] MIPS: Ingenic: Fix bugs when detecting L2 cache of JZ4775 and X1000E 周琰杰 (Zhou Yanjie)
2020-09-27 9:03 ` [PATCH v3 0/3] Repair Ingenic SoCs L2 cache capacity detection Thomas Bogendoerfer
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