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From: Zhou Yanjie <zhouyanjie@wanyeetech.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, robh+dt@kernel.org,
	tsbogend@alpha.franken.de, hns@goldelico.com, paul@boddie.org.uk,
	dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
	sernia.zhou@foxmail.com, zhenwenjin@gmail.com
Subject: Re: [PATCH 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding.
Date: Wed, 27 May 2020 14:10:40 +0800	[thread overview]
Message-ID: <c6798ff1-53fa-8b81-e56b-6b28f1c49ab4@wanyeetech.com> (raw)
In-Reply-To: <H9DYAQ.4YAB8VVZPLZO@crapouillou.net>

Hi Paul,

在 2020/5/27 上午3:10, Paul Cercueil 写道:
> Hi Zhou,
>
> Le mer. 27 mai 2020 à 1:07, 周琰杰 (Zhou Yanjie) 
> <zhouyanjie@wanyeetech.com> a écrit :
>> Document the available properties for the SoC root node and the
>> CPU nodes of the devicetree for the Ingenic XBurst SoCs.
>>
>> Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
>> Tested-by: Paul Boddie <paul@boddie.org.uk>
>> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
>> ---
>>  .../bindings/mips/ingenic/ingenic,cpu.yaml         | 57 
>> ++++++++++++++++++++++
>>  1 file changed, 57 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml 
>> b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
>> new file mode 100644
>> index 000000000000..afb02071a756
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
>> @@ -0,0 +1,57 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Bindings for Ingenic XBurst family CPUs
>> +
>> +maintainers:
>> +  - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
>> +
>> +description:
>> +  Ingenic XBurst family CPUs shall have the following properties.
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +
>> +      - description: Ingenic XBurst®1 CPU Cores
>> +        items:
>
> Strip the 'items', put the enum directly.
>

Sure, I'll drop it in the next version.


>> +          enum:
>> +            - ingenic,xburst-mxu1.0
>> +            - ingenic,xburst-fpu1.0-mxu1.1
>> +            - ingenic,xburst-fpu2.0-mxu2.0
>> +
>> +      - description: Ingenic XBurst®2 CPU Cores
>> +        items:
>
> Same here.
>

Sure.


>> +          enum:
>> +            - ingenic,xburst2-fpu2.1-mxu2.1-smt
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - device_type
>> +  - compatible
>> +  - reg
>
> device_type is not in the list of your properties.
>
> Also, I think you need a clock in there.
>

Sure, I will add it.


Thanks and best regards!


> -Paul
>
>> +
>> +examples:
>> +  - |
>> +    cpus {
>> +        #address-cells = <1>;
>> +        #size-cells = <0>;
>> +
>> +        cpu0: cpu@0 {
>> +            device_type = "cpu";
>> +            compatible = "ingenic,xburst-fpu1.0-mxu1.1";
>> +            reg = <0>;
>> +        };
>> +
>> +        cpu1: cpu@1 {
>> +            device_type = "cpu";
>> +            compatible = "ingenic,xburst-fpu1.0-mxu1.1";
>> +            reg = <1>;
>> +        };
>> +    };
>> +...
>> -- 
>> 2.11.0
>>
>

  reply	other threads:[~2020-05-27  6:11 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 17:07 [PATCH 0/1] Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-05-26 17:07 ` [PATCH 1/1] dt-bindings: MIPS: " 周琰杰 (Zhou Yanjie)
2020-05-26 19:10   ` Paul Cercueil
2020-05-27  6:10     ` Zhou Yanjie [this message]
2020-05-29 17:39     ` Rob Herring

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