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From: Roman Kagan <rkagan@virtuozzo.com>
To: Andy Lutomirski <luto@kernel.org>
Cc: "X86 ML" <x86@kernel.org>, "Borislav Petkov" <bpetkov@suse.de>,
	"Linus Torvalds" <torvalds@linux-foundation.org>,
	"Andrew Morton" <akpm@linux-foundation.org>,
	"Mel Gorman" <mgorman@suse.de>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"Nadav Amit" <nadav.amit@gmail.com>,
	"Rik van Riel" <riel@redhat.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	kvm@vger.kernel.org, "Dave Hansen" <dave.hansen@intel.com>,
	"Nadav Amit" <namit@vmware.com>, "Michal Hocko" <mhocko@suse.com>,
	"Arjan van de Ven" <arjan@linux.intel.com>
Subject: Re: [PATCH v4 8/8] x86,kvm: Teach KVM's VMX code that CR3 isn't a constant
Date: Fri, 14 Jul 2017 23:06:25 +0300	[thread overview]
Message-ID: <20170714200624.GA22585@rkaganb.sw.ru> (raw)
In-Reply-To: <7d369dab491071edc02d39e2fa2b218a3be401f2.1495990440.git.luto@kernel.org>

On Sun, May 28, 2017 at 10:00:17AM -0700, Andy Lutomirski wrote:
> When PCID is enabled, CR3's PCID bits can change during context
> switches, so KVM won't be able to treat CR3 as a per-mm constant any
> more.
> 
> I structured this like the existing CR4 handling.  Under ordinary
> circumstances (PCID disabled or if the current PCID and the value
> that's already in the VMCS match), then we won't do an extra VMCS
> write, and we'll never do an extra direct CR3 read.  The overhead
> should be minimal.
> 
> I disallowed using the new helper in non-atomic context because
> PCID support will cause CR3 to stop being constant in non-atomic
> process context.
> 
> (Frankly, it also scares me a bit that KVM ever treated CR3 as
> constant, but it looks like it was okay before.)
> 
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Radim KrA?mA!A? <rkrcmar@redhat.com>
> Cc: kvm@vger.kernel.org
> Cc: Rik van Riel <riel@redhat.com>
> Cc: Dave Hansen <dave.hansen@intel.com>
> Cc: Nadav Amit <namit@vmware.com>
> Cc: Michal Hocko <mhocko@suse.com>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Arjan van de Ven <arjan@linux.intel.com>
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> ---
>  arch/x86/include/asm/mmu_context.h | 19 +++++++++++++++++++
>  arch/x86/kvm/vmx.c                 | 21 ++++++++++++++++++---
>  2 files changed, 37 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
> index 187c39470a0b..f20d7ea47095 100644
> --- a/arch/x86/include/asm/mmu_context.h
> +++ b/arch/x86/include/asm/mmu_context.h
> @@ -266,4 +266,23 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,
>  	return __pkru_allows_pkey(vma_pkey(vma), write);
>  }
>  
> +
> +/*
> + * This can be used from process context to figure out what the value of
> + * CR3 is without needing to do a (slow) read_cr3().
> + *
> + * It's intended to be used for code like KVM that sneakily changes CR3
> + * and needs to restore it.  It needs to be used very carefully.
> + */
> +static inline unsigned long __get_current_cr3_fast(void)
> +{
> +	unsigned long cr3 = __pa(this_cpu_read(cpu_tlbstate.loaded_mm)->pgd);
> +
> +	/* For now, be very restrictive about when this can be called. */
> +	VM_WARN_ON(in_nmi() || !in_atomic());

With the following config (from Fedora26 + olddefconfig)

  $ grep PREEMPT .config
  CONFIG_PREEMPT_NOTIFIERS=y
  # CONFIG_PREEMPT_NONE is not set
  CONFIG_PREEMPT_VOLUNTARY=y
  # CONFIG_PREEMPT is not set

I hit this warning on !in_atomic() on every vm entry.  Shouldn't this be
preemptible() instead?

Roman.

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  reply	other threads:[~2017-07-14 20:06 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-28 17:00 [PATCH v4 0/8] x86 TLB flush cleanups, moving toward PCID support Andy Lutomirski
2017-05-28 17:00 ` [PATCH v4 1/8] x86/mm: Pass flush_tlb_info to flush_tlb_others() etc Andy Lutomirski
2017-05-29 19:26   ` Rik van Riel
2017-05-28 17:00 ` [PATCH v4 2/8] x86/mm: Change the leave_mm() condition for local TLB flushes Andy Lutomirski
2017-05-29 20:39   ` Rik van Riel
2017-05-28 17:00 ` [PATCH v4 3/8] x86/mm: Refactor flush_tlb_mm_range() to merge local and remote cases Andy Lutomirski
2017-05-29 23:42   ` Rik van Riel
2017-05-31 13:58     ` Andy Lutomirski
2017-06-01  1:49       ` Rik van Riel
2017-05-29 23:49   ` Rik van Riel
2017-05-29 23:53     ` Rik van Riel
2017-05-28 17:00 ` [PATCH v4 4/8] x86/mm: Use new merged flush logic in arch_tlbbatch_flush() Andy Lutomirski
2017-05-28 17:00 ` [PATCH v4 5/8] x86/mm: Remove the UP tlbflush code; always use the formerly SMP code Andy Lutomirski
2017-05-28 17:00 ` [PATCH v4 6/8] x86/mm: Rework lazy TLB to track the actual loaded mm Andy Lutomirski
2017-05-28 17:00 ` [PATCH v4 7/8] x86/mm: Be more consistent wrt PAGE_SHIFT vs PAGE_SIZE in tlb flush code Andy Lutomirski
2017-05-28 17:00 ` [PATCH v4 8/8] x86,kvm: Teach KVM's VMX code that CR3 isn't a constant Andy Lutomirski
2017-07-14 20:06   ` Roman Kagan [this message]
2017-07-15 16:42     ` Andy Lutomirski
2017-06-06 13:17 ` [PATCH v4 0/8] x86 TLB flush cleanups, moving toward PCID support Ingo Molnar
2017-06-06 15:55   ` Andy Lutomirski

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